serial: stm32x7: align compatible with kernel one
[oweals/u-boot.git] / drivers / serial / serial_msm.c
index 80fb89ea8b05ee872e3eae01864ca248c936515d..7bed756a71f147f3ea48b2b563925878dfb0506d 100644 (file)
@@ -146,15 +146,16 @@ static const struct dm_serial_ops msm_serial_ops = {
 
 static int msm_uart_clk_init(struct udevice *dev)
 {
-       uint clk_rate = fdtdec_get_uint(gd->fdt_blob, dev->of_offset,
+       uint clk_rate = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev),
                                        "clock-frequency", 115200);
        uint clkd[2]; /* clk_id and clk_no */
        int clk_offset;
-       struct udevice *clk;
+       struct udevice *clk_dev;
+       struct clk clk;
        int ret;
 
-       ret = fdtdec_get_int_array(gd->fdt_blob, dev->of_offset, "clock", clkd,
-                                  2);
+       ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(dev), "clock",
+                                  clkd, 2);
        if (ret)
                return ret;
 
@@ -162,11 +163,17 @@ static int msm_uart_clk_init(struct udevice *dev)
        if (clk_offset < 0)
                return clk_offset;
 
-       ret = uclass_get_device_by_of_offset(UCLASS_CLK, clk_offset, &clk);
+       ret = uclass_get_device_by_of_offset(UCLASS_CLK, clk_offset, &clk_dev);
        if (ret)
                return ret;
 
-       ret = clk_set_periph_rate(clk, clkd[1], clk_rate);
+       clk.id = clkd[1];
+       ret = clk_request(clk_dev, &clk);
+       if (ret < 0)
+               return ret;
+
+       ret = clk_set_rate(&clk, clk_rate);
+       clk_free(&clk);
        if (ret < 0)
                return ret;
 
@@ -194,7 +201,7 @@ static int msm_serial_ofdata_to_platdata(struct udevice *dev)
 {
        struct msm_serial_data *priv = dev_get_priv(dev);
 
-       priv->base = dev_get_addr(dev);
+       priv->base = devfdt_get_addr(dev);
        if (priv->base == FDT_ADDR_T_NONE)
                return -EINVAL;