Merge git://git.denx.de/u-boot-socfpga

[oweals/u-boot.git] / drivers / serial / ns16550.c

diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index 1e6fc6c66839c844aaaf1c808633ba020b085fa2..754b6e99215822190b1b2eecb7c592302895904b 100644 (file)
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -21,7 +21,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define UART_MCRVAL (UART_MCR_DTR | \
                     UART_MCR_RTS)              /* RTS/DTR */
 
-#ifndef CONFIG_DM_SERIAL
+#if !CONFIG_IS_ENABLED(DM_SERIAL)
 #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
 #define serial_out(x, y)       outb(x, (ulong)y)
 #define serial_in(y)           inb((ulong)y)
@@ -86,7 +86,7 @@ static inline int serial_in_shift(void *addr, int shift)
 #endif
 }
 
-#ifdef CONFIG_DM_SERIAL
+#if CONFIG_IS_ENABLED(DM_SERIAL)
 
 #ifndef CONFIG_SYS_NS16550_CLK
 #define CONFIG_SYS_NS16550_CLK  0
@@ -148,10 +148,13 @@ int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate)
 
 static void NS16550_setbrg(NS16550_t com_port, int baud_divisor)
 {
-       serial_out(UART_LCR_BKSE | UART_LCRVAL, &com_port->lcr);
+       /* to keep serial format, read lcr before writing BKSE */
+       int lcr_val = serial_in(&com_port->lcr) & ~UART_LCR_BKSE;
+
+       serial_out(UART_LCR_BKSE | lcr_val, &com_port->lcr);
        serial_out(baud_divisor & 0xff, &com_port->dll);
        serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm);
-       serial_out(UART_LCRVAL, &com_port->lcr);
+       serial_out(lcr_val, &com_port->lcr);
 }
 
 void NS16550_init(NS16550_t com_port, int baud_divisor)
@@ -181,6 +184,8 @@ void NS16550_init(NS16550_t com_port, int baud_divisor)
 
        serial_out(UART_MCRVAL, &com_port->mcr);
        serial_out(ns16550_getfcr(com_port), &com_port->fcr);
+       /* initialize serial config to 8N1 before writing baudrate */
+       serial_out(UART_LCRVAL, &com_port->lcr);
        if (baud_divisor != -1)
                NS16550_setbrg(com_port, baud_divisor);
 #if defined(CONFIG_ARCH_OMAP2PLUS) || defined(CONFIG_SOC_DA8XX) || \
@@ -284,8 +289,10 @@ static inline void _debug_uart_putc(int ch)
        struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
 
        while (!(serial_din(&com_port->lsr) & UART_LSR_THRE)) {
+#ifdef CONFIG_DEBUG_UART_NS16550_CHECK_ENABLED
                if (!NS16550_read_baud_divisor(com_port))
                        return;
+#endif
        }
        serial_dout(&com_port->thr, ch);
 }
@@ -294,7 +301,7 @@ DEBUG_UART_FUNCS
 
 #endif
 
-#ifdef CONFIG_DM_SERIAL
+#if CONFIG_IS_ENABLED(DM_SERIAL)
 static int ns16550_serial_putc(struct udevice *dev, const char ch)
 {
        struct NS16550 *const com_port = dev_get_priv(dev);
@@ -348,6 +355,58 @@ static int ns16550_serial_setbrg(struct udevice *dev, int baudrate)
        return 0;
 }
 
+static int ns16550_serial_setconfig(struct udevice *dev, uint serial_config)
+{
+       struct NS16550 *const com_port = dev_get_priv(dev);
+       int lcr_val = UART_LCR_WLS_8;
+       uint parity = SERIAL_GET_PARITY(serial_config);
+       uint bits = SERIAL_GET_BITS(serial_config);
+       uint stop = SERIAL_GET_STOP(serial_config);
+
+       /*
+        * only parity config is implemented, check if other serial settings
+        * are the default one.
+        */
+       if (bits != SERIAL_8_BITS || stop != SERIAL_ONE_STOP)
+               return -ENOTSUPP; /* not supported in driver*/
+
+       switch (parity) {
+       case SERIAL_PAR_NONE:
+               /* no bits to add */
+               break;
+       case SERIAL_PAR_ODD:
+               lcr_val |= UART_LCR_PEN;
+               break;
+       case SERIAL_PAR_EVEN:
+               lcr_val |= UART_LCR_PEN | UART_LCR_EPS;
+               break;
+       default:
+               return -ENOTSUPP; /* not supported in driver*/
+       }
+
+       serial_out(lcr_val, &com_port->lcr);
+       return 0;
+}
+
+static int ns16550_serial_getinfo(struct udevice *dev,
+                                 struct serial_device_info *info)
+{
+       struct NS16550 *const com_port = dev_get_priv(dev);
+       struct ns16550_platdata *plat = com_port->plat;
+
+       info->type = SERIAL_CHIP_16550_COMPATIBLE;
+#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
+       info->addr_space = SERIAL_ADDRESS_SPACE_IO;
+#else
+       info->addr_space = SERIAL_ADDRESS_SPACE_MEMORY;
+#endif
+       info->addr = plat->base;
+       info->reg_width = plat->reg_width;
+       info->reg_shift = plat->reg_shift;
+       info->reg_offset = plat->reg_offset;
+       return 0;
+}
+
 int ns16550_serial_probe(struct udevice *dev)
 {
        struct NS16550 *const com_port = dev_get_priv(dev);
@@ -381,36 +440,7 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
        int err;
 
        /* try Processor Local Bus device first */
-       addr = dev_read_addr(dev);
-#if defined(CONFIG_PCI) && defined(CONFIG_DM_PCI)
-       if (addr == FDT_ADDR_T_NONE) {
-               /* then try pci device */
-               struct fdt_pci_addr pci_addr;
-               u32 bar;
-               int ret;
-
-               /* we prefer to use a memory-mapped register */
-               ret = fdtdec_get_pci_addr(gd->fdt_blob, dev_of_offset(dev),
-                                         FDT_PCI_SPACE_MEM32, "reg",
-                                         &pci_addr);
-               if (ret) {
-                       /* try if there is any i/o-mapped register */
-                       ret = fdtdec_get_pci_addr(gd->fdt_blob,
-                                                 dev_of_offset(dev),
-                                                 FDT_PCI_SPACE_IO,
-                                                 "reg", &pci_addr);
-                       if (ret)
-                               return ret;
-               }
-
-               ret = fdtdec_get_pci_bar32(dev, &pci_addr, &bar);
-               if (ret)
-                       return ret;
-
-               addr = bar;
-       }
-#endif
-
+       addr = dev_read_addr_pci(dev);
        if (addr == FDT_ADDR_T_NONE)
                return -EINVAL;
 
@@ -422,6 +452,7 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
 
        plat->reg_offset = dev_read_u32_default(dev, "reg-offset", 0);
        plat->reg_shift = dev_read_u32_default(dev, "reg-shift", 0);
+       plat->reg_width = dev_read_u32_default(dev, "reg-io-width", 1);
 
        err = clk_get_by_index(dev, 0, &clk);
        if (!err) {
@@ -454,6 +485,8 @@ const struct dm_serial_ops ns16550_serial_ops = {
        .pending = ns16550_serial_pending,
        .getc = ns16550_serial_getc,
        .setbrg = ns16550_serial_setbrg,
+       .setconfig = ns16550_serial_setconfig,
+       .getinfo = ns16550_serial_getinfo,
 };
 
 #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)