struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
while (!(serial_din(&com_port->lsr) & UART_LSR_THRE)) {
+#ifdef CONFIG_DEBUG_UART_NS16550_CHECK_ENABLED
if (!NS16550_read_baud_divisor(com_port))
return;
+#endif
}
serial_dout(&com_port->thr, ch);
}
return 0;
}
+static int ns16550_serial_getinfo(struct udevice *dev,
+ struct serial_device_info *info)
+{
+ struct NS16550 *const com_port = dev_get_priv(dev);
+ struct ns16550_platdata *plat = com_port->plat;
+
+ info->type = SERIAL_CHIP_16550_COMPATIBLE;
+#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
+ info->addr_space = SERIAL_ADDRESS_SPACE_IO;
+#else
+ info->addr_space = SERIAL_ADDRESS_SPACE_MEMORY;
+#endif
+ info->addr = plat->base;
+ info->reg_width = plat->reg_width;
+ info->reg_shift = plat->reg_shift;
+ info->reg_offset = plat->reg_offset;
+ return 0;
+}
+
int ns16550_serial_probe(struct udevice *dev)
{
struct NS16550 *const com_port = dev_get_priv(dev);
/* try Processor Local Bus device first */
addr = dev_read_addr(dev);
-#if defined(CONFIG_PCI) && defined(CONFIG_DM_PCI)
+#if CONFIG_IS_ENABLED(PCI) && defined(CONFIG_DM_PCI)
if (addr == FDT_ADDR_T_NONE) {
/* then try pci device */
struct fdt_pci_addr pci_addr;
plat->reg_offset = dev_read_u32_default(dev, "reg-offset", 0);
plat->reg_shift = dev_read_u32_default(dev, "reg-shift", 0);
+ plat->reg_width = dev_read_u32_default(dev, "reg-io-width", 1);
err = clk_get_by_index(dev, 0, &clk);
if (!err) {
.pending = ns16550_serial_pending,
.getc = ns16550_serial_getc,
.setbrg = ns16550_serial_setbrg,
- .setconfig = ns16550_serial_setconfig
+ .setconfig = ns16550_serial_setconfig,
+ .getinfo = ns16550_serial_getinfo,
};
#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)