+// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2004, Psyent Corporation <www.psyent.com>
* Scott McNutt <smcnutt@psyent.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
*/
-
#include <common.h>
-#include <watchdog.h>
-#include <asm/io.h>
-#include <nios2-io.h>
-#include <linux/compiler.h>
+#include <dm.h>
+#include <errno.h>
#include <serial.h>
+#include <asm/io.h>
-DECLARE_GLOBAL_DATA_PTR;
+/* status register */
+#define ALTERA_UART_TMT BIT(5) /* tx empty */
+#define ALTERA_UART_TRDY BIT(6) /* tx ready */
+#define ALTERA_UART_RRDY BIT(7) /* rx ready */
+
+struct altera_uart_regs {
+ u32 rxdata; /* Rx data reg */
+ u32 txdata; /* Tx data reg */
+ u32 status; /* Status reg */
+ u32 control; /* Control reg */
+ u32 divisor; /* Baud rate divisor reg */
+ u32 endofpacket; /* End-of-packet reg */
+};
-/*------------------------------------------------------------------
- * UART the serial port
- *-----------------------------------------------------------------*/
+struct altera_uart_platdata {
+ struct altera_uart_regs *regs;
+ unsigned int uartclk;
+};
-static nios_uart_t *uart = (nios_uart_t *) CONFIG_SYS_NIOS_CONSOLE;
+static int altera_uart_setbrg(struct udevice *dev, int baudrate)
+{
+ struct altera_uart_platdata *plat = dev->platdata;
+ struct altera_uart_regs *const regs = plat->regs;
+ u32 div;
-#if defined(CONFIG_SYS_NIOS_FIXEDBAUD)
+ div = (plat->uartclk / baudrate) - 1;
+ writel(div, ®s->divisor);
-/*
- * Everything's already setup for fixed-baud PTF
- * assignment
- */
-static void altera_serial_setbrg(void)
-{
+ return 0;
}
-static int altera_serial_init(void)
+static int altera_uart_putc(struct udevice *dev, const char ch)
{
- return 0;
-}
+ struct altera_uart_platdata *plat = dev->platdata;
+ struct altera_uart_regs *const regs = plat->regs;
-#else
+ if (!(readl(®s->status) & ALTERA_UART_TRDY))
+ return -EAGAIN;
-static void altera_serial_setbrg(void)
-{
- unsigned div;
+ writel(ch, ®s->txdata);
- div = (CONFIG_SYS_CLK_FREQ/gd->baudrate)-1;
- writel (div, &uart->divisor);
+ return 0;
}
-static int altera_serial_init(void)
+static int altera_uart_pending(struct udevice *dev, bool input)
{
- serial_setbrg();
- return 0;
+ struct altera_uart_platdata *plat = dev->platdata;
+ struct altera_uart_regs *const regs = plat->regs;
+ u32 st = readl(®s->status);
+
+ if (input)
+ return st & ALTERA_UART_RRDY ? 1 : 0;
+ else
+ return !(st & ALTERA_UART_TMT);
}
-#endif /* CONFIG_SYS_NIOS_FIXEDBAUD */
-
-/*-----------------------------------------------------------------------
- * UART CONSOLE
- *---------------------------------------------------------------------*/
-static void altera_serial_putc(char c)
+static int altera_uart_getc(struct udevice *dev)
{
- if (c == '\n')
- serial_putc ('\r');
- while ((readl (&uart->status) & NIOS_UART_TRDY) == 0)
- WATCHDOG_RESET ();
- writel ((unsigned char)c, &uart->txdata);
+ struct altera_uart_platdata *plat = dev->platdata;
+ struct altera_uart_regs *const regs = plat->regs;
+
+ if (!(readl(®s->status) & ALTERA_UART_RRDY))
+ return -EAGAIN;
+
+ return readl(®s->rxdata) & 0xff;
}
-static int altera_serial_tstc(void)
+static int altera_uart_probe(struct udevice *dev)
{
- return (readl (&uart->status) & NIOS_UART_RRDY);
+ return 0;
}
-static int altera_serial_getc(void)
+static int altera_uart_ofdata_to_platdata(struct udevice *dev)
{
- while (serial_tstc () == 0)
- WATCHDOG_RESET ();
- return (readl (&uart->rxdata) & 0x00ff );
+ struct altera_uart_platdata *plat = dev_get_platdata(dev);
+
+ plat->regs = map_physmem(devfdt_get_addr(dev),
+ sizeof(struct altera_uart_regs),
+ MAP_NOCACHE);
+ plat->uartclk = dev_read_u32_default(dev, "clock-frequency", 0);
+
+ return 0;
}
-static struct serial_device altera_serial_drv = {
- .name = "altera_serial",
- .start = altera_serial_init,
- .stop = NULL,
- .setbrg = altera_serial_setbrg,
- .putc = altera_serial_putc,
- .puts = default_serial_puts,
- .getc = altera_serial_getc,
- .tstc = altera_serial_tstc,
+static const struct dm_serial_ops altera_uart_ops = {
+ .putc = altera_uart_putc,
+ .pending = altera_uart_pending,
+ .getc = altera_uart_getc,
+ .setbrg = altera_uart_setbrg,
+};
+
+static const struct udevice_id altera_uart_ids[] = {
+ { .compatible = "altr,uart-1.0" },
+ {}
+};
+
+U_BOOT_DRIVER(altera_uart) = {
+ .name = "altera_uart",
+ .id = UCLASS_SERIAL,
+ .of_match = altera_uart_ids,
+ .ofdata_to_platdata = altera_uart_ofdata_to_platdata,
+ .platdata_auto_alloc_size = sizeof(struct altera_uart_platdata),
+ .probe = altera_uart_probe,
+ .ops = &altera_uart_ops,
};
-void altera_serial_initialize(void)
+#ifdef CONFIG_DEBUG_UART_ALTERA_UART
+
+#include <debug_uart.h>
+
+static inline void _debug_uart_init(void)
{
- serial_register(&altera_serial_drv);
+ struct altera_uart_regs *regs = (void *)CONFIG_DEBUG_UART_BASE;
+ u32 div;
+
+ div = (CONFIG_DEBUG_UART_CLOCK / CONFIG_BAUDRATE) - 1;
+ writel(div, ®s->divisor);
}
-__weak struct serial_device *default_serial_console(void)
+static inline void _debug_uart_putc(int ch)
{
- return &altera_serial_drv;
+ struct altera_uart_regs *regs = (void *)CONFIG_DEBUG_UART_BASE;
+
+ while (1) {
+ u32 st = readl(®s->status);
+
+ if (st & ALTERA_UART_TRDY)
+ break;
+ }
+
+ writel(ch, ®s->txdata);
}
+
+DEBUG_UART_FUNCS
+
+#endif
projects / oweals / u-boot.git / blobdiff