ram: rk3399: migrate to use common code
[oweals/u-boot.git] / drivers / ram / rockchip / sdram-rk3399-lpddr4-800.inc
index d8ae3359a394c5d7131479f091443fc9b85c1f2e..307f6ee458e70a70334a03ccee8c01357c373fd7 100644 (file)
                                .row_3_4 = 0x0,
                                .cs0_row = 0xF,
                                .cs1_row = 0xF,
+                               .cs0_high16bit_row = 0xF,
+                               .cs1_high16bit_row = 0xF,
                                .ddrconfig = 1,
                        },
                        {
-                               .ddrtiminga0 = 0x80241d22,
-                               .ddrtimingb0 = 0x15050f08,
+                               .ddrtiminga0 = {
+                                       0x80241d22,
+                               },
+                               .ddrtimingb0 = {
+                                       0x15050f08,
+                               },
                                .ddrtimingc0 = {
                                        0x00000602,
                                },
-                               .devtodev0 = 0x00002122,
+                               .devtodev0 = {
+                                       0x00002122,
+                               },
                                .ddrmode = {
                                        0x0000004c,
                                },
                                .row_3_4 = 0x0,
                                .cs0_row = 0xF,
                                .cs1_row = 0xF,
+                               .cs0_high16bit_row = 0xF,
+                               .cs1_high16bit_row = 0xF,
                                .ddrconfig = 1,
                        },
                        {
-                               .ddrtiminga0 = 0x80241d22,
-                               .ddrtimingb0 = 0x15050f08,
+                               .ddrtiminga0 = {
+                                       0x80241d22,
+                               },
+                               .ddrtimingb0 = {
+                                       0x15050f08,
+                               },
                                .ddrtimingc0 = {
                                        0x00000602,
                                },
-                               .devtodev0 = 0x00002122,
+                               .devtodev0 = {
+                                       0x00002122,
+                               },
                                .ddrmode = {
                                        0x0000004c,
                                },