net: sun8i_emac: Use consistent clock bitfield definitions

[oweals/u-boot.git] / drivers / ram / Kconfig

diff --git a/drivers/ram/Kconfig b/drivers/ram/Kconfig
index 61afd7a92a4814111ee0b12ee912ee12825f8a4c..56fea7c94c97645f5d470cab1ce8c7d7eeb9eb47 100644 (file)
--- a/drivers/ram/Kconfig
+++ b/drivers/ram/Kconfig
@@ -10,13 +10,22 @@ config RAM
 
 config SPL_RAM
        bool "Enable RAM support in SPL"
-       depends on RAM
+       depends on RAM && SPL_DM
        help
          The RAM subsystem adds a small amount of overhead to the image.
          If this is acceptable and you have a need to use RAM drivers in
          SPL, enable this option. It might provide a cleaner interface to
          setting up RAM (e.g. SDRAM / DDR) within SPL.
 
+config TPL_RAM
+       bool "Enable RAM support in TPL"
+       depends on RAM
+       help
+         The RAM subsystem adds a small amount of overhead to the image.
+         If this is acceptable and you have a need to use RAM drivers in
+         TPL, enable this option. It might provide a cleaner interface to
+         setting up RAM (e.g. SDRAM / DDR) within TPL.
+
 config STM32_SDRAM
        bool "Enable STM32 SDRAM support"
        depends on RAM
@@ -24,3 +33,45 @@ config STM32_SDRAM
          STM32F7 family devices support flexible memory controller(FMC) to
          support external memories like sdram, psram & nand.
          This driver is for the sdram memory interface with the FMC.
+
+config MPC83XX_SDRAM
+       bool "Enable MPC83XX SDRAM support"
+       depends on RAM
+       help
+         Enable support for the internal DDR Memory Controller of the MPC83xx
+         family of SoCs. Both static configurations, as well as configuring
+         the RAM through the use of SPD (Serial Presence Detect) is supported
+         via device tree settings.
+
+config K3_AM654_DDRSS
+       bool "Enable AM654 DDRSS support"
+       depends on RAM && SOC_K3_AM6
+       help
+         K3 based AM654 devices has DDR memory subsystem that comprises
+         Synopys DDR controller, Synopsis DDR phy and wrapper logic to
+         intergrate these blocks into the device. This DDR subsystem
+         provides an interface to external SDRAM devices. Enabling this
+         config add support for the initialization of the external
+         SDRAM devices connected to DDR subsystem.
+
+config K3_J721E_DDRSS
+       bool "Enable J721E DDRSS support"
+       depends on RAM
+       help
+         The J721E DDR subsystem comprises DDR controller, DDR PHY and
+         wrapper logic to integrate these blocks in the device. The DDR
+         subsystem is used to provide an interface to external SDRAM
+         devices which can be utilized for storing program or data.
+         Enabling this config adds support for the DDR memory controller
+         on J721E family of SoCs.
+
+config IMXRT_SDRAM
+       bool "Enable i.MXRT SDRAM support"
+       depends on RAM
+       help
+         i.MXRT family devices support smart external memory controller(SEMC)
+         to support external memories like sdram, psram & nand.
+         This driver is for the sdram memory interface with the SEMC.
+
+source "drivers/ram/rockchip/Kconfig"
+source "drivers/ram/stm32mp1/Kconfig"