Merge branch 'master' of git://git.denx.de/u-boot-arm

[oweals/u-boot.git] / drivers / qe / uec_phy.c

diff --git a/drivers/qe/uec_phy.c b/drivers/qe/uec_phy.c
index fa48feaf04252c0c50167898b99ddf84efcfaf37..9be784e6add8063ebf7fe72efa92e808fa4fadaa 100644 (file)
--- a/drivers/qe/uec_phy.c
+++ b/drivers/qe/uec_phy.c
@@ -71,8 +71,8 @@
  *                 {name, speed, duplex},
  *
  *     #define CONFIG_SYS_FIXED_PHY_PORTS \
- *                 CONFIG_SYS_FIXED_PHY_PORT("FSL UEC0",SPEED_100,DUPLEX_FULL) \
- *                 CONFIG_SYS_FIXED_PHY_PORT("FSL UEC2",SPEED_100,DUPLEX_HALF)
+ *                 CONFIG_SYS_FIXED_PHY_PORT("UEC0",SPEED_100,DUPLEX_FULL) \
+ *                 CONFIG_SYS_FIXED_PHY_PORT("UEC2",SPEED_100,DUPLEX_HALF)
  */
 
 #ifndef CONFIG_FIXED_PHY
@@ -93,6 +93,27 @@ static const struct fixed_phy_port fixed_phy_port[] = {
        CONFIG_SYS_FIXED_PHY_PORTS /* defined in board configuration file */
 };
 
+/*--------------------------------------------------------------------+
+ * BitBang MII support for ethernet ports
+ *
+ * Based from MPC8560ADS implementation
+ *--------------------------------------------------------------------*/
+/*
+ * Example board header file to define bitbang ethernet ports:
+ *
+ * #define CONFIG_SYS_BITBANG_PHY_PORT(name) name,
+ * #define CONFIG_SYS_BITBANG_PHY_PORTS CONFIG_SYS_BITBANG_PHY_PORT("UEC0")
+*/
+#ifndef CONFIG_SYS_BITBANG_PHY_PORTS
+#define CONFIG_SYS_BITBANG_PHY_PORTS   /* default is an empty array */
+#endif
+
+#if defined(CONFIG_BITBANGMII)
+static const char *bitbang_phy_port[] = {
+       CONFIG_SYS_BITBANG_PHY_PORTS /* defined in board configuration file */
+};
+#endif /* CONFIG_BITBANGMII */
+
 static void config_genmii_advert (struct uec_mii_info *mii_info);
 static void genmii_setup_forced (struct uec_mii_info *mii_info);
 static void genmii_restart_aneg (struct uec_mii_info *mii_info);
@@ -113,6 +134,19 @@ void uec_write_phy_reg (struct eth_device *dev, int mii_id, int regnum, int valu
        enet_tbi_mii_reg_e mii_reg = (enet_tbi_mii_reg_e) regnum;
        u32 tmp_reg;
 
+
+#if defined(CONFIG_BITBANGMII)
+       u32 i = 0;
+
+       for (i = 0; i < ARRAY_SIZE(bitbang_phy_port); i++) {
+               if (strncmp(dev->name, bitbang_phy_port[i],
+                       sizeof(dev->name)) == 0) {
+                       (void)bb_miiphy_write(NULL, mii_id, regnum, value);
+                       return;
+               }
+       }
+#endif /* CONFIG_BITBANGMII */
+
        ug_regs = ugeth->uec_mii_regs;
 
        /* Stop the MII management read cycle */
@@ -140,6 +174,19 @@ int uec_read_phy_reg (struct eth_device *dev, int mii_id, int regnum)
        u32 tmp_reg;
        u16 value;
 
+
+#if defined(CONFIG_BITBANGMII)
+       u32 i = 0;
+
+       for (i = 0; i < ARRAY_SIZE(bitbang_phy_port); i++) {
+               if (strncmp(dev->name, bitbang_phy_port[i],
+                       sizeof(dev->name)) == 0) {
+                       (void)bb_miiphy_read(NULL, mii_id, regnum, &value);
+                       return (value);
+               }
+       }
+#endif /* CONFIG_BITBANGMII */
+
        ug_regs = ugeth->uec_mii_regs;
 
        /* Setting up the MII Mangement Address Register */
@@ -304,6 +351,15 @@ static int marvell_config_aneg (struct uec_mii_info *mii_info)
 static int genmii_config_aneg (struct uec_mii_info *mii_info)
 {
        if (mii_info->autoneg) {
+               /* Speed up the common case, if link is already up, speed and
+                  duplex match, skip auto neg as it already matches */
+               if (!genmii_read_status(mii_info) && mii_info->link)
+                       if (mii_info->duplex == DUPLEX_FULL &&
+                           mii_info->speed == SPEED_100)
+                               if (mii_info->advertising &
+                                   ADVERTISED_100baseT_Full)
+                                       return 0;
+
                config_genmii_advert (mii_info);
                genmii_restart_aneg (mii_info);
        } else
@@ -342,7 +398,6 @@ static int genmii_update_link (struct uec_mii_info *mii_info)
                        status = phy_read(mii_info, PHY_BMSR);
                }
                mii_info->link = 1;
-               udelay(500000); /* another 500 ms (results in faster booting) */
        } else {
                if (status & PHY_BMSR_LS)
                        mii_info->link = 1;