Merge tag 'dm-pull-15oct19' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm

[oweals/u-boot.git] / drivers / qe / uec.c

diff --git a/drivers/qe/uec.c b/drivers/qe/uec.c
index d83852081f4a35257da942cf3f533355e9b85580..69cdf9444a6f522042bcddd577ab5998eeca658d 100644 (file)
--- a/drivers/qe/uec.c
+++ b/drivers/qe/uec.c
@@ -1,17 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2006-2011 Freescale Semiconductor, Inc.
  *
  * Dave Liu <daveliu@freescale.com>
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
-#include "common.h"
-#include "net.h"
-#include "malloc.h"
-#include "asm/errno.h"
-#include "asm/io.h"
-#include "linux/immap_qe.h"
+#include <common.h>
+#include <net.h>
+#include <malloc.h>
+#include <linux/errno.h>
+#include <asm/io.h>
+#include <linux/immap_qe.h>
 #include "uccf.h"
 #include "uec.h"
 #include "uec_phy.h"
@@ -567,7 +566,7 @@ static void phy_change(struct eth_device *dev)
 {
        uec_private_t   *uec = (uec_private_t *)dev->priv;
 
-#if defined(CONFIG_P1012) || defined(CONFIG_P1021) || defined(CONFIG_P1025)
+#if defined(CONFIG_ARCH_P1021) || defined(CONFIG_ARCH_P1025)
        ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
 
        /* QE9 and QE12 need to be set for enabling QE MII managment signals */
@@ -578,7 +577,7 @@ static void phy_change(struct eth_device *dev)
        /* Update the link, speed, duplex */
        uec->mii_info->phyinfo->read_status(uec->mii_info);
 
-#if defined(CONFIG_P1012) || defined(CONFIG_P1021) || defined(CONFIG_P1025)
+#if defined(CONFIG_ARCH_P1021) || defined(CONFIG_ARCH_P1025)
        /*
         * QE12 is muxed with LBCTL, it needs to be released for enabling
         * LBCTL signal for LBC usage.
@@ -628,7 +627,7 @@ static int uec_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg)
        unsigned short value = 0;
        int devindex = 0;
 
-       if (bus->name == NULL || &value == NULL) {
+       if (bus->name == NULL) {
                debug("%s: NULL pointer given\n", __FUNCTION__);
        } else {
                devindex = uec_miiphy_find_dev_by_name(bus->name);
@@ -1193,14 +1192,14 @@ static int uec_init(struct eth_device* dev, bd_t *bd)
        uec_private_t           *uec;
        int                     err, i;
        struct phy_info         *curphy;
-#if defined(CONFIG_P1012) || defined(CONFIG_P1021) || defined(CONFIG_P1025)
+#if defined(CONFIG_ARCH_P1021) || defined(CONFIG_ARCH_P1025)
        ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
 #endif
 
        uec = (uec_private_t *)dev->priv;
 
        if (uec->the_first_run == 0) {
-#if defined(CONFIG_P1012) || defined(CONFIG_P1021) || defined(CONFIG_P1025)
+#if defined(CONFIG_ARCH_P1021) || defined(CONFIG_ARCH_P1025)
        /* QE9 and QE12 need to be set for enabling QE MII managment signals */
        setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_QE9);
        setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_QE12);
@@ -1232,7 +1231,7 @@ static int uec_init(struct eth_device* dev, bd_t *bd)
                        udelay(100000);
                } while (1);
 
-#if defined(CONFIG_P1012) || defined(CONFIG_P1021) || defined(CONFIG_P1025)
+#if defined(CONFIG_ARCH_P1021) || defined(CONFIG_ARCH_P1025)
                /* QE12 needs to be released for enabling LBCTL signal*/
                clrbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_QE12);
 #endif