phy: atheros: move delay config to common function

[oweals/u-boot.git] / drivers / pwm / Kconfig

diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig
index e5880ac84f680a5b5ca690d94762c8d7129abfcb..edb3f0f538edf1a89571e12510882369b1499cbf 100644 (file)
--- a/drivers/pwm/Kconfig
+++ b/drivers/pwm/Kconfig
@@ -9,6 +9,27 @@ config DM_PWM
          frequency/period can be controlled along with the proportion of that
          time that the signal is high.
 
+config PWM_EXYNOS
+       bool "Enable support for the Exynos PWM"
+       depends on DM_PWM
+       help
+         This PWM is found on Samsung Exynos 5250 and other Samsung SoCs. It
+         supports a programmable period and duty cycle. A 32-bit counter is
+         used. It provides 5 channels which can be independently
+         programmed. Channel 4 (the last) is normally used as a timer.
+
+config PWM_IMX
+       bool "Enable support for i.MX27 and later PWM"
+       help
+         This PWM is found i.MX27 and later i.MX SoCs.
+
+config PWM_MTK
+       bool "Enable support for MediaTek PWM"
+       depends on DM_PWM
+       help
+         This PWM is found on MT7622, MT7623, and MT7629. It supports a
+         programmable period and duty cycle.
+
 config PWM_ROCKCHIP
        bool "Enable support for the Rockchip PWM"
        depends on DM_PWM
@@ -18,10 +39,26 @@ config PWM_ROCKCHIP
          Various options provided in the hardware (such as capture mode and
          continuous/single-shot) are not supported by the driver.
 
+config PWM_SANDBOX
+       bool "Enable support for the sandbox PWM"
+       help
+         This is a sandbox PWM used for testing. It provides 3 channels and
+         records the settings passed into it, but otherwise does nothing
+         useful. The PWM can be enabled but is not connected to any outputs
+         so this is not very useful.
+
 config PWM_TEGRA
        bool "Enable support for the Tegra PWM"
+       depends on DM_PWM
        help
          This PWM is found on Tegra 20 and other Nvidia SoCs. It supports
          four channels with a programmable period and duty cycle. Only a
          32KHz clock is supported by the driver but the duty cycle is
          configurable.
+
+config PWM_SUNXI
+       bool "Enable support for the Allwinner Sunxi PWM"
+       depends on DM_PWM
+       help
+         This PWM is found on H3, A64 and other Allwinner SoCs. It supports a
+         programmable period and duty cycle. A 16-bit counter is used.