Merge branch 'master' of git://git.denx.de/u-boot-sunxi

[oweals/u-boot.git] / drivers / pinctrl / rockchip / pinctrl_rk3288.c

diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3288.c b/drivers/pinctrl/rockchip/pinctrl_rk3288.c
index 7c769bdb016c799989bbcae34d5089e7d099f62a..cb13d30da8e9e8769a1053a6281f4126ac10af2d 100644 (file)
--- a/drivers/pinctrl/rockchip/pinctrl_rk3288.c
+++ b/drivers/pinctrl/rockchip/pinctrl_rk3288.c
@@ -17,7 +17,6 @@
 #include <asm/arch/periph.h>
 #include <asm/arch/pmu_rk3288.h>
 #include <dm/pinctrl.h>
-#include <dm/root.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -476,10 +475,11 @@ static int rk3288_pinctrl_request(struct udevice *dev, int func, int flags)
 static int rk3288_pinctrl_get_periph_id(struct udevice *dev,
                                        struct udevice *periph)
 {
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
        u32 cell[3];
        int ret;
 
-       ret = fdtdec_get_int_array(gd->fdt_blob, periph->of_offset,
+       ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(periph),
                                   "interrupts", cell, ARRAY_SIZE(cell));
        if (ret < 0)
                return -EINVAL;
@@ -506,6 +506,7 @@ static int rk3288_pinctrl_get_periph_id(struct udevice *dev,
        case 103:
                return PERIPH_ID_HDMI;
        }
+#endif
 
        return -ENOENT;
 }
@@ -587,6 +588,7 @@ static int rk3288_pinctrl_set_pins(struct udevice *dev, int banknum, int index,
        struct rk3288_pinctrl_priv *priv = dev_get_priv(dev);
        uint shift, ind = index;
        uint mask;
+       uint value;
        u32 *addr;
        int ret;
 
@@ -595,7 +597,18 @@ static int rk3288_pinctrl_set_pins(struct udevice *dev, int banknum, int index,
                                          &mask);
        if (ret)
                return ret;
-       rk_clrsetreg(addr, mask << shift, muxval << shift);
+
+       /*
+        * PMU_GPIO0 registers cannot be selectively written so we cannot use
+        * rk_clrsetreg() here.  However, the upper 16 bits are reserved and
+        * are ignored when written, so we can use the same code as for the
+        * other GPIO banks providing that we preserve the value of the other
+        * bits.
+        */
+       value = readl(addr);
+       value &= ~(mask << shift);
+       value |= (mask << (shift + 16)) | (muxval << shift);
+       writel(value, addr);
 
        /* Handle pullup/pulldown */
        if (flags) {
@@ -613,7 +626,12 @@ static int rk3288_pinctrl_set_pins(struct udevice *dev, int banknum, int index,
                        addr = &priv->grf->gpio1_p[banknum - 1][ind];
                debug("%s: addr=%p, val=%x, shift=%x\n", __func__, addr, val,
                      shift);
-               rk_clrsetreg(addr, 3 << shift, val << shift);
+
+               /* As above, rk_clrsetreg() cannot be used here. */
+               value = readl(addr);
+               value &= ~(mask << shift);
+               value |= (3 << (shift + 16)) | (val << shift);
+               writel(value, addr);
        }
 
        return 0;
@@ -623,10 +641,10 @@ static int rk3288_pinctrl_set_state(struct udevice *dev, struct udevice *config)
 {
        const void *blob = gd->fdt_blob;
        int pcfg_node, ret, flags, count, i;
-       u32 cell[40], *ptr;
+       u32 cell[60], *ptr;
 
        debug("%s: %s %s\n", __func__, dev->name, config->name);
-       ret = fdtdec_get_int_array_count(blob, config->of_offset,
+       ret = fdtdec_get_int_array_count(blob, dev_of_offset(config),
                                         "rockchip,pins", cell,
                                         ARRAY_SIZE(cell));
        if (ret < 0) {
@@ -662,12 +680,6 @@ static struct pinctrl_ops rk3288_pinctrl_ops = {
        .get_periph_id  = rk3288_pinctrl_get_periph_id,
 };
 
-static int rk3288_pinctrl_bind(struct udevice *dev)
-{
-       /* scan child GPIO banks */
-       return dm_scan_fdt_node(dev, gd->fdt_blob, dev->of_offset, false);
-}
-
 #ifndef CONFIG_SPL_BUILD
 static int rk3288_pinctrl_parse_tables(struct rk3288_pinctrl_priv *priv,
                                       struct rockchip_pin_bank *banks,
@@ -719,11 +731,13 @@ static const struct udevice_id rk3288_pinctrl_ids[] = {
 };
 
 U_BOOT_DRIVER(pinctrl_rk3288) = {
-       .name           = "pinctrl_rk3288",
+       .name           = "rockchip_rk3288_pinctrl",
        .id             = UCLASS_PINCTRL,
        .of_match       = rk3288_pinctrl_ids,
        .priv_auto_alloc_size = sizeof(struct rk3288_pinctrl_priv),
        .ops            = &rk3288_pinctrl_ops,
-       .bind           = rk3288_pinctrl_bind,
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+       .bind           = dm_scan_fdt_dev,
+#endif
        .probe          = rk3288_pinctrl_probe,
 };