Merge tag 'ti-v2020.07-rc2' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti

[oweals/u-boot.git] / drivers / phy / phy-stm32-usbphyc.c

diff --git a/drivers/phy/phy-stm32-usbphyc.c b/drivers/phy/phy-stm32-usbphyc.c
index 54363cd165f2b3194990a6a49736de3b6ba80435..6ba37213cb8cd8413ab89f2d599b51ed368dd8d0 100644 (file)
--- a/drivers/phy/phy-stm32-usbphyc.c
+++ b/drivers/phy/phy-stm32-usbphyc.c
@@ -13,6 +13,7 @@
 #include <syscon.h>
 #include <usb.h>
 #include <asm/io.h>
+#include <dm/device_compat.h>
 #include <linux/bitops.h>
 #include <power/regulator.h>
 
@@ -37,7 +38,8 @@
 
 #define MAX_PHYS               2
 
-#define PLL_LOCK_TIME_US       100
+/* max 100 us for PLL lock and 100 us for PHY init */
+#define PLL_INIT_TIME_US       200
 #define PLL_PWR_DOWN_TIME_US   5
 #define PLL_FVCO               2880     /* in MHz */
 #define PLL_INFF_MIN_RATE      19200000 /* in Hz */
@@ -177,11 +179,8 @@ static int stm32_usbphyc_phy_init(struct phy *phy)
 
        setbits_le32(usbphyc->base + STM32_USBPHYC_PLL, PLLEN);
 
-       /*
-        * We must wait PLL_LOCK_TIME_US before checking that PLLEN
-        * bit is still set
-        */
-       udelay(PLL_LOCK_TIME_US);
+       /* We must wait PLL_INIT_TIME_US before using PHY */
+       udelay(PLL_INIT_TIME_US);
 
        if (!(readl(usbphyc->base + STM32_USBPHYC_PLL) & PLLEN))
                return -EIO;