kconfig / kbuild: Re-sync with Linux 4.19

[oweals/u-boot.git] / drivers / pci / pcie_layerscape_gen4_fixup.c

diff --git a/drivers/pci/pcie_layerscape_gen4_fixup.c b/drivers/pci/pcie_layerscape_gen4_fixup.c
index b58ddd55cd331a94b73354a14555187259737b39..bfe197e7d83f4de4cdd72507dcb1e6fac2b4e6ac 100644 (file)
--- a/drivers/pci/pcie_layerscape_gen4_fixup.c
+++ b/drivers/pci/pcie_layerscape_gen4_fixup.c
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0+ OR X11
 /*
- * Copyright 2018-2019 NXP
+ * Copyright 2018-2020 NXP
  *
  * PCIe Gen4 driver for NXP Layerscape SoCs
  * Author: Hou Zhiqiang <Minder.Hou@gmail.com>
@@ -19,6 +19,7 @@
 #include <asm/arch/clock.h>
 #endif
 #include "pcie_layerscape_gen4.h"
+#include "pcie_layerscape_fixup_common.h"
 
 #if defined(CONFIG_FSL_LSCH3) || defined(CONFIG_FSL_LSCH2)
 /*
@@ -32,19 +33,6 @@ static int ls_pcie_g4_next_lut_index(struct ls_pcie_g4 *pcie)
        return -ENOSPC;  /* LUT is full */
 }
 
-/* returns the next available streamid for pcie, -errno if failed */
-static int ls_pcie_g4_next_streamid(struct ls_pcie_g4 *pcie)
-{
-       int stream_id = pcie->stream_id_cur;
-
-       if (stream_id > FSL_PEX_STREAM_ID_END)
-               return -EINVAL;
-
-       pcie->stream_id_cur++;
-
-       return stream_id | ((pcie->idx + 1) << 11);
-}
-
 /*
  * Program a single LUT entry
  */
@@ -161,10 +149,12 @@ static void fdt_fixup_pcie_ls_gen4(void *blob)
                        bus = bus->parent;
                pcie = dev_get_priv(bus);
 
-               streamid = ls_pcie_g4_next_streamid(pcie);
+               streamid = pcie_next_streamid(pcie->stream_id_cur, pcie->idx);
                if (streamid < 0) {
                        debug("ERROR: no stream ids free\n");
                        continue;
+               } else {
+                       pcie->stream_id_cur++;
                }
 
                index = ls_pcie_g4_next_lut_index(pcie);
@@ -191,7 +181,7 @@ static void ft_pcie_ep_layerscape_gen4_fix(void *blob, struct ls_pcie_g4 *pcie)
 {
        int off;
 
-       off = fdt_node_offset_by_compat_reg(blob, "fsl,lx2160a-pcie-ep",
+       off = fdt_node_offset_by_compat_reg(blob, CONFIG_FSL_PCIE_EP_COMPAT,
                                            pcie->ccsr_res.start);
 
        if (off < 0) {
@@ -234,7 +224,7 @@ static void ft_pcie_layerscape_gen4_setup(void *blob, struct ls_pcie_g4 *pcie)
 }
 
 /* Fixup Kernel DT for PCIe */
-void ft_pci_setup(void *blob, bd_t *bd)
+void ft_pci_setup_ls_gen4(void *blob, bd_t *bd)
 {
        struct ls_pcie_g4 *pcie;
 
@@ -247,7 +237,7 @@ void ft_pci_setup(void *blob, bd_t *bd)
 }
 
 #else /* !CONFIG_OF_BOARD_SETUP */
-void ft_pci_setup(void *blob, bd_t *bd)
+void ft_pci_setup_ls_gen4(void *blob, bd_t *bd)
 {
 }
 #endif