imx: imx8qm/qxp: check whether m4 partition booted

[oweals/u-boot.git] / drivers / pci / pcie_layerscape_fixup.c

diff --git a/drivers/pci/pcie_layerscape_fixup.c b/drivers/pci/pcie_layerscape_fixup.c
index e2ea7c875075d907b0e7e27871b009042db76510..ec6acbb138d960d0b3ace2018607a429d78659c8 100644 (file)
--- a/drivers/pci/pcie_layerscape_fixup.c
+++ b/drivers/pci/pcie_layerscape_fixup.c
@@ -1,9 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
- * Copyright 2017 NXP
+ * Copyright 2017-2020 NXP
  * Copyright 2014-2015 Freescale Semiconductor, Inc.
  * Layerscape PCIe driver
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
@@ -18,6 +17,7 @@
 #include <asm/arch/clock.h>
 #endif
 #include "pcie_layerscape.h"
+#include "pcie_layerscape_fixup_common.h"
 
 #if defined(CONFIG_FSL_LSCH3) || defined(CONFIG_FSL_LSCH2)
 /*
@@ -31,17 +31,6 @@ static int ls_pcie_next_lut_index(struct ls_pcie *pcie)
                return -ENOSPC;  /* LUT is full */
 }
 
-/* returns the next available streamid for pcie, -errno if failed */
-static int ls_pcie_next_streamid(void)
-{
-       static int next_stream_id = FSL_PEX_STREAM_ID_START;
-
-       if (next_stream_id > FSL_PEX_STREAM_ID_END)
-               return -EINVAL;
-
-       return next_stream_id++;
-}
-
 static void lut_writel(struct ls_pcie *pcie, unsigned int value,
                       unsigned int offset)
 {
@@ -70,8 +59,8 @@ static void ls_pcie_lut_set_mapping(struct ls_pcie *pcie, int index, u32 devid,
  *      msi-map = <[devid] [phandle-to-msi-ctrl] [stream-id] [count]
  *                 [devid] [phandle-to-msi-ctrl] [stream-id] [count]>;
  */
-static void fdt_pcie_set_msi_map_entry(void *blob, struct ls_pcie *pcie,
-                                      u32 devid, u32 streamid)
+static void fdt_pcie_set_msi_map_entry_ls(void *blob, struct ls_pcie *pcie,
+                                         u32 devid, u32 streamid)
 {
        u32 *prop;
        u32 phandle;
@@ -123,8 +112,8 @@ static void fdt_pcie_set_msi_map_entry(void *blob, struct ls_pcie *pcie,
  *      iommu-map = <[devid] [phandle-to-iommu-ctrl] [stream-id] [count]
  *                 [devid] [phandle-to-iommu-ctrl] [stream-id] [count]>;
  */
-static void fdt_pcie_set_iommu_map_entry(void *blob, struct ls_pcie *pcie,
-                                      u32 devid, u32 streamid)
+static void fdt_pcie_set_iommu_map_entry_ls(void *blob, struct ls_pcie *pcie,
+                                           u32 devid, u32 streamid)
 {
        u32 *prop;
        u32 iommu_map[4];
@@ -176,7 +165,7 @@ static void fdt_pcie_set_iommu_map_entry(void *blob, struct ls_pcie *pcie,
        }
 }
 
-static void fdt_fixup_pcie(void *blob)
+static void fdt_fixup_pcie_ls(void *blob)
 {
        struct udevice *dev, *bus;
        struct ls_pcie *pcie;
@@ -192,10 +181,12 @@ static void fdt_fixup_pcie(void *blob)
                        bus = bus->parent;
                pcie = dev_get_priv(bus);
 
-               streamid = ls_pcie_next_streamid();
+               streamid = pcie_next_streamid(pcie->stream_id_cur, pcie->idx);
                if (streamid < 0) {
                        debug("ERROR: no stream ids free\n");
                        continue;
+               } else {
+                       pcie->stream_id_cur++;
                }
 
                index = ls_pcie_next_lut_index(pcie);
@@ -210,16 +201,17 @@ static void fdt_fixup_pcie(void *blob)
                ls_pcie_lut_set_mapping(pcie, index, bdf >> 8,
                                        streamid);
                /* update msi-map in device tree */
-               fdt_pcie_set_msi_map_entry(blob, pcie, bdf >> 8,
-                                          streamid);
+               fdt_pcie_set_msi_map_entry_ls(blob, pcie, bdf >> 8,
+                                             streamid);
                /* update iommu-map in device tree */
-               fdt_pcie_set_iommu_map_entry(blob, pcie, bdf >> 8,
-                                            streamid);
+               fdt_pcie_set_iommu_map_entry_ls(blob, pcie, bdf >> 8,
+                                               streamid);
        }
+       pcie_board_fix_fdt(blob);
 }
 #endif
 
-static void ft_pcie_ls_setup(void *blob, struct ls_pcie *pcie)
+static void ft_pcie_rc_fix(void *blob, struct ls_pcie *pcie)
 {
        int off;
        uint svr;
@@ -244,14 +236,35 @@ static void ft_pcie_ls_setup(void *blob, struct ls_pcie *pcie)
                        return;
        }
 
-       if (pcie->enabled)
+       if (pcie->enabled && pcie->mode == PCI_HEADER_TYPE_BRIDGE)
+               fdt_set_node_status(blob, off, FDT_STATUS_OKAY, 0);
+       else
+               fdt_set_node_status(blob, off, FDT_STATUS_DISABLED, 0);
+}
+
+static void ft_pcie_ep_fix(void *blob, struct ls_pcie *pcie)
+{
+       int off;
+
+       off = fdt_node_offset_by_compat_reg(blob, CONFIG_FSL_PCIE_EP_COMPAT,
+                                           pcie->dbi_res.start);
+       if (off < 0)
+               return;
+
+       if (pcie->enabled && pcie->mode == PCI_HEADER_TYPE_NORMAL)
                fdt_set_node_status(blob, off, FDT_STATUS_OKAY, 0);
        else
                fdt_set_node_status(blob, off, FDT_STATUS_DISABLED, 0);
 }
 
+static void ft_pcie_ls_setup(void *blob, struct ls_pcie *pcie)
+{
+       ft_pcie_ep_fix(blob, pcie);
+       ft_pcie_rc_fix(blob, pcie);
+}
+
 /* Fixup Kernel DT for PCIe */
-void ft_pci_setup(void *blob, bd_t *bd)
+void ft_pci_setup_ls(void *blob, bd_t *bd)
 {
        struct ls_pcie *pcie;
 
@@ -259,12 +272,12 @@ void ft_pci_setup(void *blob, bd_t *bd)
                ft_pcie_ls_setup(blob, pcie);
 
 #if defined(CONFIG_FSL_LSCH3) || defined(CONFIG_FSL_LSCH2)
-       fdt_fixup_pcie(blob);
+       fdt_fixup_pcie_ls(blob);
 #endif
 }
 
 #else /* !CONFIG_OF_BOARD_SETUP */
-void ft_pci_setup(void *blob, bd_t *bd)
+void ft_pci_setup_ls(void *blob, bd_t *bd)
 {
 }
 #endif