+/* SPDX-License-Identifier: GPL-2.0+ */
/*
+ * Copyright 2017-2019 NXP
* Copyright 2014-2015 Freescale Semiconductor, Inc.
* Layerscape PCIe driver
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _PCIE_LAYERSCAPE_H_
#define SVR_LS2084A 0x870910
#define SVR_LS2048A 0x870920
#define SVR_LS2044A 0x870930
+#define SVR_LS2081A 0x870918
+#define SVR_LS2041A 0x870914
/* LS1021a PCIE space */
#define LS1021_PCIE_SPACE_OFFSET 0x4000000000ULL
bool big_endian;
bool enabled;
int next_lut_index;
- struct pci_controller hose;
+ int stream_id_cur;
+ int mode;
};
extern struct list_head ls_pcie_list;