pci: Make Rockchip PCIe voltage regulators optional

[oweals/u-boot.git] / drivers / pci / pci_auto.c

diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c
index 88bc416c61628fd2c44042dbd22dd79eb0480729..3f46b7697d7caa7ad3c78f4d9bf3ffc031d0d641 100644 (file)
--- a/drivers/pci/pci_auto.c
+++ b/drivers/pci/pci_auto.c
@@ -1,16 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * PCI autoconfiguration library
  *
  * Author: Matt Porter <mporter@mvista.com>
  *
  * Copyright 2000 MontaVista Software Inc.
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <pci.h>
 
 /* the user can define CONFIG_SYS_PCI_CACHE_LINE_SIZE to avoid problems */
@@ -30,7 +30,7 @@ void dm_pciauto_setup_device(struct udevice *dev, int bars_num,
        u8 header_type;
        int rom_addr;
        pci_addr_t bar_value;
-       struct pci_region *bar_res;
+       struct pci_region *bar_res = NULL;
        int found_mem64 = 0;
        u16 class;
 
@@ -40,6 +40,8 @@ void dm_pciauto_setup_device(struct udevice *dev, int bars_num,
 
        for (bar = PCI_BASE_ADDRESS_0;
             bar < PCI_BASE_ADDRESS_0 + (bars_num * 4); bar += 4) {
+               int ret = 0;
+
                /* Tickle the BAR and get the response */
                if (!enum_only)
                        dm_pci_write_config32(dev, bar, 0xffffffff);
@@ -98,8 +100,13 @@ void dm_pciauto_setup_device(struct udevice *dev, int bars_num,
                              (unsigned long long)bar_size);
                }
 
-               if (!enum_only && pciauto_region_allocate(bar_res, bar_size,
-                                                         &bar_value) == 0) {
+               if (!enum_only) {
+                       ret = pciauto_region_allocate(bar_res, bar_size,
+                                                     &bar_value, found_mem64);
+                       if (ret)
+                               printf("PCI: Failed autoconfig bar %x\n", bar);
+               }
+               if (!enum_only && !ret) {
                        /* Write it out and update our limit */
                        dm_pci_write_config32(dev, bar, (u32)bar_value);
 
@@ -141,7 +148,8 @@ void dm_pciauto_setup_device(struct udevice *dev, int bars_num,
                                debug("PCI Autoconfig: ROM, size=%#x, ",
                                      (unsigned int)bar_size);
                                if (pciauto_region_allocate(mem, bar_size,
-                                                           &bar_value) == 0) {
+                                                           &bar_value,
+                                                           false) == 0) {
                                        dm_pci_write_config32(dev, rom_addr,
                                                              bar_value);
                                }
@@ -181,8 +189,8 @@ void dm_pciauto_prescan_setup_bridge(struct udevice *dev, int sub_bus)
 
        /* Configure bus number registers */
        dm_pci_write_config8(dev, PCI_PRIMARY_BUS,
-                            PCI_BUS(dm_pci_get_bdf(dev)));
-       dm_pci_write_config8(dev, PCI_SECONDARY_BUS, sub_bus);
+                            PCI_BUS(dm_pci_get_bdf(dev)) - ctlr->seq);
+       dm_pci_write_config8(dev, PCI_SECONDARY_BUS, sub_bus - ctlr->seq);
        dm_pci_write_config8(dev, PCI_SUBORDINATE_BUS, 0xff);
 
        if (pci_mem) {
@@ -257,7 +265,7 @@ void dm_pciauto_postscan_setup_bridge(struct udevice *dev, int sub_bus)
        pci_io = ctlr_hose->pci_io;
 
        /* Configure bus number registers */
-       dm_pci_write_config8(dev, PCI_SUBORDINATE_BUS, sub_bus);
+       dm_pci_write_config8(dev, PCI_SUBORDINATE_BUS, sub_bus - ctlr->seq);
 
        if (pci_mem) {
                /* Round memory allocator to 1MB boundary */
@@ -358,7 +366,8 @@ int dm_pciauto_config_device(struct udevice *dev)
                      PCI_DEV(dm_pci_get_bdf(dev)));
                break;
 #endif
-#if defined(CONFIG_MPC834x) && !defined(CONFIG_VME8349)
+#if defined(CONFIG_ARCH_MPC834X) && !defined(CONFIG_TARGET_VME8349) && \
+               !defined(CONFIG_TARGET_CADDY2)
        case PCI_CLASS_BRIDGE_OTHER:
                /*
                 * The host/PCI bridge 1 seems broken in 8349 - it presents