struct mii_dev *bus;
};
-static u32 etherrxbuff[PKTSIZE_ALIGN/4]; /* Receive buffer */
+static uchar etherrxbuff[PKTSIZE_ALIGN]; /* Receive buffer */
static void xemaclite_alignedread(u32 *srcptr, void *destptr, u32 bytecount)
{
return 0;
}
-static void emaclite_halt(struct udevice *dev)
+static void emaclite_stop(struct udevice *dev)
{
- debug("eth_halt\n");
+ debug("eth_stop\n");
}
/* Use MII register 1 (MII status register) to detect PHY */
return 1;
}
-static int emaclite_init(struct udevice *dev)
+static int emaclite_start(struct udevice *dev)
{
struct xemaclite *emaclite = dev_get_priv(dev);
struct eth_pdata *pdata = dev_get_platdata(dev);
out_be32(ack, reg);
debug("Packet receive from 0x%p, length %dB\n", addr, length);
- net_process_received_packet((uchar *)etherrxbuff, length);
- return 0;
+ *packetp = etherrxbuff;
+ return length;
}
static int emaclite_miiphy_read(struct mii_dev *bus, int addr,
}
static const struct eth_ops emaclite_ops = {
- .start = emaclite_init,
+ .start = emaclite_start,
.send = emaclite_send,
.recv = emaclite_recv,
- .stop = emaclite_halt,
+ .stop = emaclite_stop,
};
static int emaclite_ofdata_to_platdata(struct udevice *dev)