configs: Add DDR Kconfig support for Arria 10
[oweals/u-boot.git] / drivers / net / sun8i_emac.c
index c8c8ef73e9b774d8f706ac3411490100ec3306b4..1f5c630e0232f9faaca3d481087338888bd7708a 100644 (file)
@@ -1,9 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * (C) Copyright 2016
  * Author: Amit Singh Tomar, amittomer25@gmail.com
  *
- * SPDX-License-Identifier:     GPL-2.0+
- *
  * Ethernet driver for H3/A64/A83T based SoC's
  *
  * It is derived from the work done by
@@ -279,7 +278,7 @@ static int sun8i_emac_set_syscon(struct emac_eth_dev *priv)
        int ret;
        u32 reg;
 
-       reg = readl(priv->sysctl_reg);
+       reg = readl(priv->sysctl_reg + 0x30);
 
        if (priv->variant == H3_EMAC) {
                ret = sun8i_emac_set_syscon_ephy(priv, &reg);
@@ -310,7 +309,7 @@ static int sun8i_emac_set_syscon(struct emac_eth_dev *priv)
                return -EINVAL;
        }
 
-       writel(reg, priv->sysctl_reg);
+       writel(reg, priv->sysctl_reg + 0x30);
 
        return 0;
 }
@@ -456,7 +455,7 @@ static int parse_phy_pins(struct udevice *dev)
 {
        int offset;
        const char *pin_name;
-       int drive, pull, i;
+       int drive, pull = SUN4I_PINCTRL_NO_PULL, i;
 
        offset = fdtdec_lookup_phandle(gd->fdt_blob, dev_of_offset(dev),
                                       "pinctrl-0");
@@ -476,31 +475,20 @@ static int parse_phy_pins(struct udevice *dev)
                        drive = SUN4I_PINCTRL_30_MA;
                else
                        drive = SUN4I_PINCTRL_40_MA;
-       } else {
-               drive = fdt_getprop_u32_default_node(gd->fdt_blob, offset, 0,
-                                                    "allwinner,drive", 4);
        }
 
        if (fdt_get_property(gd->fdt_blob, offset, "bias-pull-up", NULL))
                pull = SUN4I_PINCTRL_PULL_UP;
-       else if (fdt_get_property(gd->fdt_blob, offset, "bias-disable", NULL))
-               pull = SUN4I_PINCTRL_NO_PULL;
        else if (fdt_get_property(gd->fdt_blob, offset, "bias-pull-down", NULL))
                pull = SUN4I_PINCTRL_PULL_DOWN;
-       else
-               pull = fdt_getprop_u32_default_node(gd->fdt_blob, offset, 0,
-                                                   "allwinner,pull", 0);
+
        for (i = 0; ; i++) {
                int pin;
 
                pin_name = fdt_stringlist_get(gd->fdt_blob, offset,
-                                             "allwinner,pins", i, NULL);
-               if (!pin_name) {
-                       pin_name = fdt_stringlist_get(gd->fdt_blob, offset,
-                                                     "pins", i, NULL);
-                       if (!pin_name)
-                               break;
-               }
+                                             "pins", i, NULL);
+               if (!pin_name)
+                       break;
 
                pin = sunxi_name_to_gpio(pin_name);
                if (pin < 0)
@@ -798,6 +786,7 @@ static int sun8i_emac_eth_ofdata_to_platdata(struct udevice *dev)
        struct eth_pdata *pdata = &sun8i_pdata->eth_pdata;
        struct emac_eth_dev *priv = dev_get_priv(dev);
        const char *phy_mode;
+       const fdt32_t *reg;
        int node = dev_of_offset(dev);
        int offset = 0;
 #ifdef CONFIG_DM_GPIO
@@ -805,18 +794,40 @@ static int sun8i_emac_eth_ofdata_to_platdata(struct udevice *dev)
        int ret = 0;
 #endif
 
-       pdata->iobase = devfdt_get_addr_name(dev, "emac");
-       priv->sysctl_reg = devfdt_get_addr_name(dev, "syscon");
+       pdata->iobase = devfdt_get_addr(dev);
+       if (pdata->iobase == FDT_ADDR_T_NONE) {
+               debug("%s: Cannot find MAC base address\n", __func__);
+               return -EINVAL;
+       }
+
+       offset = fdtdec_lookup_phandle(gd->fdt_blob, node, "syscon");
+       if (offset < 0) {
+               debug("%s: cannot find syscon node\n", __func__);
+               return -EINVAL;
+       }
+       reg = fdt_getprop(gd->fdt_blob, offset, "reg", NULL);
+       if (!reg) {
+               debug("%s: cannot find reg property in syscon node\n",
+                     __func__);
+               return -EINVAL;
+       }
+       priv->sysctl_reg = fdt_translate_address((void *)gd->fdt_blob,
+                                                offset, reg);
+       if (priv->sysctl_reg == FDT_ADDR_T_NONE) {
+               debug("%s: Cannot find syscon base address\n", __func__);
+               return -EINVAL;
+       }
 
        pdata->phy_interface = -1;
        priv->phyaddr = -1;
        priv->use_internal_phy = false;
 
-       offset = fdtdec_lookup_phandle(gd->fdt_blob, node,
-                                      "phy");
-       if (offset > 0)
-               priv->phyaddr = fdtdec_get_int(gd->fdt_blob, offset, "reg",
-                                              -1);
+       offset = fdtdec_lookup_phandle(gd->fdt_blob, node, "phy-handle");
+       if (offset < 0) {
+               debug("%s: Cannot find PHY address\n", __func__);
+               return -EINVAL;
+       }
+       priv->phyaddr = fdtdec_get_int(gd->fdt_blob, offset, "reg", -1);
 
        phy_mode = fdt_getprop(gd->fdt_blob, node, "phy-mode", NULL);
 
@@ -838,8 +849,11 @@ static int sun8i_emac_eth_ofdata_to_platdata(struct udevice *dev)
        }
 
        if (priv->variant == H3_EMAC) {
-               if (fdt_getprop(gd->fdt_blob, node,
-                               "allwinner,use-internal-phy", NULL))
+               int parent = fdt_parent_offset(gd->fdt_blob, offset);
+
+               if (parent >= 0 &&
+                   !fdt_node_check_compatible(gd->fdt_blob, parent,
+                               "allwinner,sun8i-h3-mdio-internal"))
                        priv->use_internal_phy = true;
        }