net: rtl8139: Move functions around

[oweals/u-boot.git] / drivers / net / sh_eth.c

diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c
index 4646f2ba4ec4ae213109f5cd588f2b1a408840ea..f8e5d05722ab90feabeebeacbf6cdf0cef2a900e 100644 (file)
--- a/drivers/net/sh_eth.c
+++ b/drivers/net/sh_eth.c
@@ -10,7 +10,8 @@
 
 #include <config.h>
 #include <common.h>
-#include <environment.h>
+#include <cpu_func.h>
+#include <env.h>
 #include <malloc.h>
 #include <net.h>
 #include <netdev.h>
@@ -34,10 +35,11 @@
 # error "Please define CONFIG_SH_ETHER_PHY_ADDR"
 #endif
 
-#if defined(CONFIG_SH_ETHER_CACHE_WRITEBACK) && !defined(CONFIG_SYS_DCACHE_OFF)
+#if defined(CONFIG_SH_ETHER_CACHE_WRITEBACK) && \
+       !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
 #define flush_cache_wback(addr, len)    \
-               flush_dcache_range((u32)addr, \
-               (u32)(addr + ALIGN(len, CONFIG_SH_ETHER_ALIGNE_SIZE)))
+               flush_dcache_range((unsigned long)addr, \
+               (unsigned long)(addr + ALIGN(len, CONFIG_SH_ETHER_ALIGNE_SIZE)))
 #else
 #define flush_cache_wback(...)
 #endif
@@ -45,11 +47,11 @@
 #if defined(CONFIG_SH_ETHER_CACHE_INVALIDATE) && defined(CONFIG_ARM)
 #define invalidate_cache(addr, len)            \
        {       \
-               u32 line_size = CONFIG_SH_ETHER_ALIGNE_SIZE;    \
-               u32 start, end; \
+               unsigned long line_size = CONFIG_SH_ETHER_ALIGNE_SIZE;  \
+               unsigned long start, end;       \
                \
-               start = (u32)addr;      \
-               end = start + len;      \
+               start = (unsigned long)addr;    \
+               end = start + len;              \
                start &= ~(line_size - 1);      \
                end = ((end + line_size - 1) & ~(line_size - 1));       \
                \
@@ -73,7 +75,7 @@ static int sh_eth_send_common(struct sh_eth_dev *eth, void *packet, int len)
        }
 
        /* packet must be a 4 byte boundary */
-       if ((int)packet & 3) {
+       if ((uintptr_t)packet & 3) {
                printf(SHETHER_NAME ": %s: packet not 4 byte aligned\n"
                                , __func__);
                ret = -EFAULT;
@@ -210,7 +212,7 @@ static int sh_eth_tx_desc_init(struct sh_eth_dev *eth)
 
        /* Make sure we use a P2 address (non-cacheable) */
        port_info->tx_desc_base =
-               (struct tx_desc_s *)ADDR_TO_P2((u32)port_info->tx_desc_alloc);
+               (struct tx_desc_s *)ADDR_TO_P2((uintptr_t)port_info->tx_desc_alloc);
        port_info->tx_desc_cur = port_info->tx_desc_base;
 
        /* Initialize all descriptors */
@@ -264,7 +266,7 @@ static int sh_eth_rx_desc_init(struct sh_eth_dev *eth)
 
        /* Make sure we use a P2 address (non-cacheable) */
        port_info->rx_desc_base =
-               (struct rx_desc_s *)ADDR_TO_P2((u32)port_info->rx_desc_alloc);
+               (struct rx_desc_s *)ADDR_TO_P2((uintptr_t)port_info->rx_desc_alloc);
 
        port_info->rx_desc_cur = port_info->rx_desc_base;
 
@@ -280,7 +282,7 @@ static int sh_eth_rx_desc_init(struct sh_eth_dev *eth)
                goto err_buf_alloc;
        }
 
-       port_info->rx_buf_base = (u8 *)ADDR_TO_P2((u32)port_info->rx_buf_alloc);
+       port_info->rx_buf_base = (u8 *)ADDR_TO_P2((uintptr_t)port_info->rx_buf_alloc);
 
        /* Initialize all descriptors */
        for (cur_rx_desc = port_info->rx_desc_base,
@@ -373,10 +375,16 @@ static void sh_eth_write_hwaddr(struct sh_eth_info *port_info,
 static void sh_eth_mac_regs_config(struct sh_eth_dev *eth, unsigned char *mac)
 {
        struct sh_eth_info *port_info = &eth->port_info[eth->port];
+       unsigned long edmr;
 
        /* Configure e-dmac registers */
-       sh_eth_write(port_info, (sh_eth_read(port_info, EDMR) & ~EMDR_DESC_R) |
-                       (EMDR_DESC | EDMR_EL), EDMR);
+       edmr = sh_eth_read(port_info, EDMR);
+       edmr &= ~EMDR_DESC_R;
+       edmr |= EMDR_DESC | EDMR_EL;
+#if defined(CONFIG_R8A77980)
+       edmr |= EDMR_NBST;
+#endif
+       sh_eth_write(port_info, edmr, EDMR);
 
        sh_eth_write(port_info, 0, EESIPR);
        sh_eth_write(port_info, 0, TRSCER);
@@ -406,7 +414,7 @@ static void sh_eth_mac_regs_config(struct sh_eth_dev *eth, unsigned char *mac)
 
 #if defined(CONFIG_CPU_SH7734) || defined(CONFIG_R8A7740)
        sh_eth_write(port_info, CONFIG_SH_ETHER_SH7734_MII, RMII_MII);
-#elif defined(CONFIG_RCAR_GEN2)
+#elif defined(CONFIG_RCAR_GEN2) || defined(CONFIG_R8A77980)
        sh_eth_write(port_info, sh_eth_read(port_info, RMIIMR) | 0x1, RMIIMR);
 #endif
 }
@@ -425,7 +433,7 @@ static int sh_eth_phy_regs_config(struct sh_eth_dev *eth)
                sh_eth_write(port_info, GECMR_100B, GECMR);
 #elif defined(CONFIG_CPU_SH7757) || defined(CONFIG_CPU_SH7752)
                sh_eth_write(port_info, 1, RTRATE);
-#elif defined(CONFIG_CPU_SH7724) || defined(CONFIG_RCAR_GEN2)
+#elif defined(CONFIG_RCAR_GEN2) || defined(CONFIG_R8A77980)
                val = ECMR_RTM;
 #endif
        } else if (phy->speed == 10) {
@@ -693,7 +701,7 @@ static int sh_ether_recv(struct udevice *dev, int flags, uchar **packetp)
        struct sh_ether_priv *priv = dev_get_priv(dev);
        struct sh_eth_dev *eth = &priv->shdev;
        struct sh_eth_info *port_info = &eth->port_info[eth->port];
-       uchar *packet = (uchar *)ADDR_TO_P2(port_info->rx_desc_cur->rd2);
+       uchar *packet = (uchar *)ADDR_TO_P2((uintptr_t)port_info->rx_desc_cur->rd2);
        int len;
 
        len = sh_eth_recv_start(eth);
@@ -806,9 +814,11 @@ static int sh_ether_probe(struct udevice *udev)
 
        priv->iobase = pdata->iobase;
 
+#if CONFIG_IS_ENABLED(CLK)
        ret = clk_get_by_index(udev, 0, &priv->clk);
        if (ret < 0)
                return ret;
+#endif
 
        ret = dev_read_phandle_with_args(udev, "phy-handle", NULL, 0, 0, &phandle_args);
        if (!ret) {
@@ -841,11 +851,17 @@ static int sh_ether_probe(struct udevice *udev)
        eth->port = CONFIG_SH_ETHER_USE_PORT;
        eth->port_info[eth->port].phy_addr = CONFIG_SH_ETHER_PHY_ADDR;
        eth->port_info[eth->port].iobase =
-               (void __iomem *)(BASE_IO_ADDR + 0x800 * eth->port);
+               (void __iomem *)(uintptr_t)(BASE_IO_ADDR + 0x800 * eth->port);
 
+#if CONFIG_IS_ENABLED(CLK)
        ret = clk_enable(&priv->clk);
        if (ret)
                goto err_mdio_register;
+#endif
+
+       ret = sh_eth_init_common(eth, pdata->enetaddr);
+       if (ret)
+               goto err_phy_config;
 
        ret = sh_eth_phy_config(udev);
        if (ret) {
@@ -856,7 +872,9 @@ static int sh_ether_probe(struct udevice *udev)
        return 0;
 
 err_phy_config:
+#if CONFIG_IS_ENABLED(CLK)
        clk_disable(&priv->clk);
+#endif
 err_mdio_register:
        mdio_free(mdiodev);
        return ret;
@@ -868,7 +886,9 @@ static int sh_ether_remove(struct udevice *udev)
        struct sh_eth_dev *eth = &priv->shdev;
        struct sh_eth_info *port_info = &eth->port_info[eth->port];
 
+#if CONFIG_IS_ENABLED(CLK)
        clk_disable(&priv->clk);
+#endif
        free(port_info->phydev);
        mdio_unregister(priv->bus);
        mdio_free(priv->bus);
@@ -917,10 +937,12 @@ int sh_ether_ofdata_to_platdata(struct udevice *dev)
 }
 
 static const struct udevice_id sh_ether_ids[] = {
+       { .compatible = "renesas,ether-r7s72100" },
        { .compatible = "renesas,ether-r8a7790" },
        { .compatible = "renesas,ether-r8a7791" },
        { .compatible = "renesas,ether-r8a7793" },
        { .compatible = "renesas,ether-r8a7794" },
+       { .compatible = "renesas,gether-r8a77980" },
        { }
 };