net: Adds Fast Ethernet Controller driver for Armada100

[oweals/u-boot.git] / drivers / net / ns8382x.c

diff --git a/drivers/net/ns8382x.c b/drivers/net/ns8382x.c
index a2d61afec7a66b535b080b078494b78397c49605..6dfcd0e94c77ff7e1fad014185fc447102449703 100644 (file)
--- a/drivers/net/ns8382x.c
+++ b/drivers/net/ns8382x.c
@@ -299,7 +299,7 @@ OUTL(struct eth_device *dev, int command, u_long addr)
  * Description: Retrieves the MAC address of the card, and sets up some
  *  globals required by other routines, and initializes the NIC, making it
  *  ready to send and receive packets.
- * Side effects: initializes ns8382xs, ready to recieve packets.
+ * Side effects: initializes ns8382xs, ready to receive packets.
  * Returns:   int:          number of cards found
  */
 
@@ -340,6 +340,11 @@ ns8382x_initialize(bd_t * bis)
                }
 
                dev = (struct eth_device *) malloc(sizeof *dev);
+               if (!dev) {
+                       printf("ns8382x: Can not allocate memory\n");
+                       break;
+               }
+               memset(dev, 0, sizeof(*dev));
 
                sprintf(dev->name, "dp8382x#%d", card_number);
                dev->iobase = bus_to_phys(iobase);
@@ -445,7 +450,7 @@ ns8382x_initialize(bd_t * bis)
        Read and write MII registers using software-generated serial MDIO
        protocol.  See the MII specifications or DP83840A data sheet for details.
 
-       The maximum data clock rate is 2.5 Mhz.  To meet minimum timing we
+       The maximum data clock rate is 2.5 MHz.  To meet minimum timing we
        must flush writes to the PCI bus with a PCI read. */
 #define mdio_delay(mdio_addr) INL(dev, mdio_addr)