#include <asm/arch/soc.h>
#include <linux/compat.h>
#include <linux/mbus.h>
+#include <asm-generic/gpio.h>
DECLARE_GLOBAL_DATA_PTR;
# error Marvell mvneta requires PHYLIB
#endif
-/* Some linux -> U-Boot compatibility stuff */
-#define netdev_err(dev, fmt, args...) \
- printf(fmt, ##args)
-#define netdev_warn(dev, fmt, args...) \
- printf(fmt, ##args)
-#define netdev_info(dev, fmt, args...) \
- printf(fmt, ##args)
-
#define CONFIG_NR_CPUS 1
#define ETH_HLEN 14 /* Total octets in header */
int init;
int phyaddr;
struct phy_device *phydev;
+#ifdef CONFIG_DM_GPIO
+ struct gpio_desc phy_reset_gpio;
+#endif
struct mii_dev *bus;
};
if (rxq->descs == NULL)
return -ENOMEM;
+ WARN_ON(rxq->descs != PTR_ALIGN(rxq->descs, ARCH_DMA_MINALIGN));
+
rxq->last_desc = rxq->size - 1;
/* Set Rx descriptors queue starting address */
if (txq->descs == NULL)
return -ENOMEM;
+ WARN_ON(txq->descs != PTR_ALIGN(txq->descs, ARCH_DMA_MINALIGN));
+
txq->last_desc = txq->size - 1;
/* Set maximum bandwidth for enabled TXQs */
phydev = phy_connect(pp->bus, pp->phyaddr, dev,
pp->phy_interface);
+ if (!phydev) {
+ printf("phy_connect failed\n");
+ return -ENODEV;
+ }
pp->phydev = phydev;
phy_config(phydev);
* be active. Make this area DMA safe by disabling the D-cache
*/
if (!buffer_loc.tx_descs) {
+ u32 size;
+
/* Align buffer area for descs and rx_buffers to 1MiB */
bd_space = memalign(1 << MMU_SECTION_SHIFT, BD_SPACE);
+ flush_dcache_range((ulong)bd_space, (ulong)bd_space + BD_SPACE);
mmu_set_region_dcache_behaviour((phys_addr_t)bd_space, BD_SPACE,
DCACHE_OFF);
buffer_loc.tx_descs = (struct mvneta_tx_desc *)bd_space;
+ size = roundup(MVNETA_MAX_TXD * sizeof(struct mvneta_tx_desc),
+ ARCH_DMA_MINALIGN);
+ memset(buffer_loc.tx_descs, 0, size);
buffer_loc.rx_descs = (struct mvneta_rx_desc *)
- ((phys_addr_t)bd_space +
- MVNETA_MAX_TXD * sizeof(struct mvneta_tx_desc));
- buffer_loc.rx_buffers = (phys_addr_t)
- (bd_space +
- MVNETA_MAX_TXD * sizeof(struct mvneta_tx_desc) +
- MVNETA_MAX_RXD * sizeof(struct mvneta_rx_desc));
+ ((phys_addr_t)bd_space + size);
+ size += roundup(MVNETA_MAX_RXD * sizeof(struct mvneta_rx_desc),
+ ARCH_DMA_MINALIGN);
+ buffer_loc.rx_buffers = (phys_addr_t)(bd_space + size);
}
pp->base = (void __iomem *)pdata->iobase;
if (ret)
return ret;
+#ifdef CONFIG_DM_GPIO
+ gpio_request_by_name(dev, "phy-reset-gpios", 0,
+ &pp->phy_reset_gpio, GPIOD_IS_OUT);
+
+ if (dm_gpio_is_valid(&pp->phy_reset_gpio)) {
+ dm_gpio_set_value(&pp->phy_reset_gpio, 1);
+ mdelay(10);
+ dm_gpio_set_value(&pp->phy_reset_gpio, 0);
+ }
+#endif
+
return board_network_enable(bus);
}