+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2004-2008 Freescale Semiconductor, Inc.
* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <asm/fec.h>
#endif
#include <asm/immap.h>
+#include <linux/mii.h>
DECLARE_GLOBAL_DATA_PTR;
# define CONFIG_SYS_UNSPEC_STRID 0
#endif
-#ifdef CONFIG_MCF547x_8x
-typedef struct fec_info_dma FEC_INFO_T;
-#define FEC_T fecdma_t
-#else
-typedef struct fec_info_s FEC_INFO_T;
-#define FEC_T fec_t
-#endif
-
typedef struct phy_info_struct {
u32 phyid;
char *strid;
* mii_init -- Initialize the MII for MII command without ethernet
* This function is a subset of eth_init
*/
-void mii_reset(FEC_INFO_T *info)
+void mii_reset(fec_info_t *info)
{
volatile FEC_T *fecp = (FEC_T *) (info->miibase);
int i;
/* send command to phy using mii, wait for result */
uint mii_send(uint mii_cmd)
{
- FEC_INFO_T *info;
- volatile FEC_T *ep;
+#ifdef CONFIG_DM_ETH
+ struct udevice *dev;
+#else
struct eth_device *dev;
+#endif
+ fec_info_t *info;
+ volatile FEC_T *ep;
uint mii_reply;
int j = 0;
ep->mmfr = mii_cmd; /* command to phy */
/* wait for mii complete */
- while (!(ep->eir & FEC_EIR_MII) && (j < MCFFEC_TOUT_LOOP)) {
+ while (!(ep->eir & FEC_EIR_MII) && (j < info->to_loop)) {
udelay(1);
j++;
}
- if (j >= MCFFEC_TOUT_LOOP) {
+ if (j >= info->to_loop) {
printf("MII not complete\n");
return -1;
}
#endif /* CONFIG_SYS_DISCOVER_PHY || (CONFIG_MII) */
#if defined(CONFIG_SYS_DISCOVER_PHY)
-int mii_discover_phy(struct eth_device *dev)
+int mii_discover_phy(fec_info_t *info)
{
#define MAX_PHY_PASSES 11
- FEC_INFO_T *info = dev->priv;
int phyaddr, pass;
uint phyno, phytype;
int i, found = 0;
phytype = mii_send(mk_mii_read(phyno, MII_PHYSID1));
#ifdef ET_DEBUG
- printf("PHY type 0x%x pass %d type\n", phytype, pass);
+ printf("PHY type 0x%x pass %d\n", phytype, pass);
#endif
if (phytype == 0xffff)
continue;
void __mii_init(void)
{
- FEC_INFO_T *info;
- volatile FEC_T *fecp;
+#ifdef CONFIG_DM_ETH
+ struct udevice *dev;
+#else
struct eth_device *dev;
+#endif
+ fec_info_t *info;
+ volatile FEC_T *fecp;
int miispd = 0, i = 0;
u16 status = 0;
u16 linkgood = 0;
fecp = (FEC_T *) info->miibase;
- fecpin_setclear(dev, 1);
+ fecpin_setclear(info, 1);
mii_reset(info);
miispd = (gd->bus_clk / 1000000) / 5;
fecp->mscr = miispd << 1;
- info->phy_addr = mii_discover_phy(dev);
+#ifdef CONFIG_SYS_DISCOVER_PHY
+ info->phy_addr = mii_discover_phy(info);
+#endif
+ if (info->phy_addr == -1)
+ return;
- while (i < MCFFEC_TOUT_LOOP) {
+ while (i < info->to_loop) {
status = 0;
i++;
/* Read PHY control register */
udelay(1);
}
- if (i >= MCFFEC_TOUT_LOOP) {
+ if (i >= info->to_loop)
printf("Link UP timeout\n");
- }
/* adapt to the duplex and speed settings of the phy */
info->dup_spd = miiphy_duplex(dev->name, info->phy_addr) << 16;
* Otherwise they hang in mii_send() !!! Sorry!
*/
-int mcffec_miiphy_read(const char *devname, unsigned char addr, unsigned char reg,
- unsigned short *value)
+int mcffec_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg)
{
short rdreg; /* register working value */
#endif
rdreg = mii_send(mk_mii_read(addr, reg));
- *value = rdreg;
-
#ifdef MII_DEBUG
- printf("0x%04x\n", *value);
+ printf("0x%04x\n", rdreg);
#endif
- return 0;
+ return rdreg;
}
-int mcffec_miiphy_write(const char *devname, unsigned char addr, unsigned char reg,
- unsigned short value)
+int mcffec_miiphy_write(struct mii_dev *bus, int addr, int devad, int reg,
+ u16 value)
{
#ifdef MII_DEBUG
- printf("miiphy_write(0x%x) @ 0x%x = ", reg, addr);
+ printf("miiphy_write(0x%x) @ 0x%x = 0x%04x\n", reg, addr, value);
#endif
mii_send(mk_mii_write(addr, reg, value));
-#ifdef MII_DEBUG
- printf("0x%04x\n", value);
-#endif
-
return 0;
}