* (C) Copyright 2000-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
- * (C) Copyright 2007
+ * (C) Copyright 2007 Freescale Semiconductor, Inc.
* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
*
* See file CREDITS for list of people who contributed to this
#include <malloc.h>
#include <asm/fec.h>
-#include <asm/m5329.h>
-#include <asm/immap_5329.h>
+#include <asm/immap.h>
#include <command.h>
-#include <config.h>
#include <net.h>
#include <miiphy.h>
-#ifdef CONFIG_MCFFEC
#undef ET_DEBUG
#undef MII_DEBUG
/* Ethernet Transmit and Receive Buffers */
-#define DBUF_LENGTH 1520
-
-#define TX_BUF_CNT 2
-
-/*
- NOTE: PKT_MAXBUF_SIZE must be larger or equal to PKT_MAXBLR_SIZE,
- see M54455 User Manual for MAX_FL of Receive Control Register for more
- description. If PKT_MAXBUF_SIZE set to 1518, the FEC bandwidth will
- reduce to about 20~40% of normal bandwidth. Changing PKT_MAXBLR_SIZE
- will not make any improvement on speed
-*/
+#define DBUF_LENGTH 1520
+#define TX_BUF_CNT 2
#define PKT_MAXBUF_SIZE 1518
#define PKT_MINBUF_SIZE 64
#define PKT_MAXBLR_SIZE 1520
DECLARE_GLOBAL_DATA_PTR;
-#if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(CONFIG_NET_MULTI)
-
struct fec_info_s fec_info[] = {
#ifdef CFG_FEC0_IOBASE
{
#endif
};
-/*
- * FEC Ethernet Tx and Rx buffer descriptors allocated at the
- * immr->udata_bd address on Dual-Port RAM
- * Provide for Double Buffering
- */
-
int fec_send(struct eth_device *dev, volatile void *packet, int length);
int fec_recv(struct eth_device *dev);
int fec_init(struct eth_device *dev, bd_t * bd);
extern int fecpin_setclear(struct eth_device *dev, int setclear);
#ifdef CFG_DISCOVER_PHY
-extern void mii_init(void);
+extern void __mii_init(void);
extern uint mii_send(uint mii_cmd);
extern int mii_discover_phy(struct eth_device *dev);
extern int mcffec_miiphy_read(char *devname, unsigned char addr,
}
if ((dup_spd & 0xFFFF) == _100BASET) {
+#ifdef CONFIG_MCF5445x
+ fecp->rcr &= ~0x200; /* disabled 10T base */
+#endif
#ifdef MII_DEBUG
printf("100Mbps\n");
#endif
bd->bi_ethspeed = 100;
} else {
+#ifdef CONFIG_MCF5445x
+ fecp->rcr |= 0x200; /* enabled 10T base */
+#endif
#ifdef MII_DEBUG
printf("10Mbps\n");
#endif
/* Activate transmit Buffer Descriptor polling */
fecp->tdar = 0x01000000; /* Descriptor polling active */
+ /* FEC fix for MCF5275, FEC unable to initial transmit data packet.
+ * A nop will ensure the descriptor polling active completed.
+ */
+#ifdef CONFIG_M5275
+ __asm__ ("nop");
+#endif
+
+#ifdef CFG_UNIFY_CACHE
+ icache_invalid();
+#endif
j = 0;
while ((info->txbd[info->txIdx].cbd_sc & BD_ENET_TX_READY) &&
(j < MCFFEC_TOUT_LOOP)) {
if (j >= MCFFEC_TOUT_LOOP) {
printf("TX timeout\n");
}
+
#ifdef ET_DEBUG
printf("%s[%d] %s: cycles: %d status: %x retry cnt: %d\n",
__FILE__, __LINE__, __FUNCTION__, j,
(info->txbd[info->txIdx].cbd_sc & 0x003C) >> 2);
#endif
- /* return only status bits */ ;
+ /* return only status bits */
rc = (info->txbd[info->txIdx].cbd_sc & BD_ENET_TX_STATS);
info->txIdx = (info->txIdx + 1) % TX_BUF_CNT;
int length;
for (;;) {
+#ifdef CFG_UNIFY_CACHE
+ icache_invalid();
+#endif
/* section 16.9.23.2 */
if (info->rxbd[info->rxIdx].cbd_sc & BD_ENET_RX_EMPTY) {
length = -1;
return length;
}
-/**************************************************************
- *
- * FEC Ethernet Initialization Routine
- *
- *************************************************************/
-
#ifdef ET_DEBUG
void dbgFecRegs(struct eth_device *dev)
{
struct fec_info_s *info = dev->priv;
volatile fec_t *fecp = (fec_t *) (info->iobase);
int i;
- u8 *ea;
+ u8 *ea = NULL;
fecpin_setclear(dev, 1);
fec_reset(dev);
-#if (CONFIG_COMMANDS & CFG_CMD_MII) || defined (CONFIG_MII) || \
+#if defined(CONFIG_CMD_MII) || defined (CONFIG_MII) || \
defined (CFG_DISCOVER_PHY)
mii_init();
#ifndef CFG_DISCOVER_PHY
setFecDuplexSpeed(fecp, bd, (FECDUPLEX << 16) | FECSPEED);
#endif /* ifndef CFG_DISCOVER_PHY */
-#endif /* CFG_CMD_MII || CONFIG_MII */
+#endif /* CONFIG_CMD_MII || CONFIG_MII */
/* We use strictly polling mode only */
fecp->eimr = 0;
/* Set station address */
if ((u32) fecp == CFG_FEC0_IOBASE) {
+#ifdef CFG_FEC1_IOBASE
+ volatile fec_t *fecp1 = (fec_t *) (CFG_FEC1_IOBASE);
+ ea = &bd->bi_enet1addr[0];
+ fecp1->palr =
+ (ea[0] << 24) | (ea[1] << 16) | (ea[2] << 8) | (ea[3]);
+ fecp1->paur = (ea[4] << 24) | (ea[5] << 16);
+#endif
ea = &bd->bi_enetaddr[0];
+ fecp->palr =
+ (ea[0] << 24) | (ea[1] << 16) | (ea[2] << 8) | (ea[3]);
+ fecp->paur = (ea[4] << 24) | (ea[5] << 16);
} else {
+#ifdef CFG_FEC0_IOBASE
+ volatile fec_t *fecp0 = (fec_t *) (CFG_FEC0_IOBASE);
+ ea = &bd->bi_enetaddr[0];
+ fecp0->palr =
+ (ea[0] << 24) | (ea[1] << 16) | (ea[2] << 8) | (ea[3]);
+ fecp0->paur = (ea[4] << 24) | (ea[5] << 16);
+#endif
#ifdef CFG_FEC1_IOBASE
ea = &bd->bi_enet1addr[0];
+ fecp->palr =
+ (ea[0] << 24) | (ea[1] << 16) | (ea[2] << 8) | (ea[3]);
+ fecp->paur = (ea[4] << 24) | (ea[5] << 16);
#endif
}
- fecp->palr = (ea[0] << 24) | (ea[1] << 16) | (ea[2] << 8) | (ea[3]);
- fecp->paur = (ea[4] << 24) | (ea[5] << 16);
-#ifdef ET_DEBUG
- printf("Eth Addrs: %02x:%02x:%02x:%02x:%02x:%02x\n",
- ea[0], ea[1], ea[2], ea[3], ea[4], ea[5]);
-#endif
-
/* Clear unicast address hash table */
fecp->iaur = 0;
fecp->ialr = 0;
for (i = 0; i < sizeof(fec_info) / sizeof(fec_info[0]); i++) {
- dev = (struct eth_device *)malloc(sizeof *dev);
+ dev =
+ (struct eth_device *)memalign(CFG_CACHELINE_SIZE,
+ sizeof *dev);
if (dev == NULL)
hang();
/* setup Receive and Transmit buffer descriptor */
fec_info[i].rxbd =
- (cbd_t *) memalign(32, (PKTBUFSRX * sizeof(cbd_t) + 31));
+ (cbd_t *) memalign(CFG_CACHELINE_SIZE,
+ (PKTBUFSRX * sizeof(cbd_t)));
fec_info[i].txbd =
- (cbd_t *) memalign(32, (TX_BUF_CNT * sizeof(cbd_t) + 31));
- fec_info[i].txbuf = (char *)memalign(32, DBUF_LENGTH + 31);
+ (cbd_t *) memalign(CFG_CACHELINE_SIZE,
+ (TX_BUF_CNT * sizeof(cbd_t)));
+ fec_info[i].txbuf =
+ (char *)memalign(CFG_CACHELINE_SIZE, DBUF_LENGTH);
#ifdef ET_DEBUG
printf("rxbd %x txbd %x\n",
(int)fec_info[i].rxbd, (int)fec_info[i].txbd);
#endif
- fec_info[i].phy_name = (char *)malloc(32);
+ fec_info[i].phy_name = (char *)memalign(CFG_CACHELINE_SIZE, 32);
eth_register(dev);
-#if defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII)
+#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
miiphy_register(dev->name,
mcffec_miiphy_read, mcffec_miiphy_write);
#endif
return 1;
}
-
-#endif /* CFG_CMD_NET, FEC_ENET & NET_MULTI */
-#endif /* CONFIG_MCFFEC */