net: pch_gbe: Convert to use DM PCI API

[oweals/u-boot.git] / drivers / net / macb.c

diff --git a/drivers/net/macb.c b/drivers/net/macb.c
index 1fe408ce7019e13090741b81e724d7c01317f500..be0659a52c820165d7f7451d0fabc2f34b0c63a5 100644 (file)
--- a/drivers/net/macb.c
+++ b/drivers/net/macb.c
@@ -54,6 +54,7 @@ struct macb_dma_desc {
 #define DMA_DESC_BYTES(n)      (n * sizeof(struct macb_dma_desc))
 #define MACB_TX_DMA_DESC_SIZE  (DMA_DESC_BYTES(MACB_TX_RING_SIZE))
 #define MACB_RX_DMA_DESC_SIZE  (DMA_DESC_BYTES(MACB_RX_RING_SIZE))
+#define MACB_TX_DUMMY_DMA_DESC_SIZE    (DMA_DESC_BYTES(1))
 
 #define RXADDR_USED            0x00000001
 #define RXADDR_WRAP            0x00000002
@@ -93,6 +94,9 @@ struct macb_device {
        unsigned long           rx_ring_dma;
        unsigned long           tx_ring_dma;
 
+       struct macb_dma_desc    *dummy_desc;
+       unsigned long           dummy_desc_dma;
+
        const struct device     *dev;
        struct eth_device       netdev;
        unsigned short          phy_addr;
@@ -105,6 +109,23 @@ static int macb_is_gem(struct macb_device *macb)
        return MACB_BFEXT(IDNUM, macb_readl(macb, MID)) == 0x2;
 }
 
+#ifndef cpu_is_sama5d2
+#define cpu_is_sama5d2() 0
+#endif
+
+#ifndef cpu_is_sama5d4
+#define cpu_is_sama5d4() 0
+#endif
+
+static int gem_is_gigabit_capable(struct macb_device *macb)
+{
+       /*
+        * The GEM controllers embeded in SAMA5D2 and SAMA5D4 are
+        * configured to support only 10/100.
+        */
+       return macb_is_gem(macb) && !cpu_is_sama5d2() && !cpu_is_sama5d4();
+}
+
 static void macb_mdio_write(struct macb_device *macb, u8 reg, u16 value)
 {
        unsigned long netctl;
@@ -347,14 +368,14 @@ static int macb_recv(struct eth_device *netdev)
                                headlen = 128 * (MACB_RX_RING_SIZE
                                                 - macb->rx_tail);
                                taillen = length - headlen;
-                               memcpy((void *)NetRxPackets[0],
+                               memcpy((void *)net_rx_packets[0],
                                       buffer, headlen);
-                               memcpy((void *)NetRxPackets[0] + headlen,
+                               memcpy((void *)net_rx_packets[0] + headlen,
                                       macb->rx_buffer, taillen);
-                               buffer = (void *)NetRxPackets[0];
+                               buffer = (void *)net_rx_packets[0];
                        }
 
-                       NetReceive(buffer, length);
+                       net_process_received_packet(buffer, length);
                        if (++rx_tail >= MACB_RX_RING_SIZE)
                                rx_tail = 0;
                        reclaim_rx_buffers(macb, rx_tail);
@@ -476,8 +497,8 @@ static int macb_phy_init(struct macb_device *macb)
                return 0;
        }
 
-       /* First check for GMAC */
-       if (macb_is_gem(macb)) {
+       /* First check for GMAC and that it is GiB capable */
+       if (gem_is_gigabit_capable(macb)) {
                lpa = macb_mdio_read(macb, MII_STAT1000);
 
                if (lpa & (LPA_1000FULL | LPA_1000HALF)) {
@@ -525,7 +546,30 @@ static int macb_phy_init(struct macb_device *macb)
        return 1;
 }
 
-static int macb_write_hwaddr(struct eth_device *dev);
+static int gmac_init_multi_queues(struct macb_device *macb)
+{
+       int i, num_queues = 1;
+       u32 queue_mask;
+
+       /* bit 0 is never set but queue 0 always exists */
+       queue_mask = gem_readl(macb, DCFG6) & 0xff;
+       queue_mask |= 0x1;
+
+       for (i = 1; i < MACB_MAX_QUEUES; i++)
+               if (queue_mask & (1 << i))
+                       num_queues++;
+
+       macb->dummy_desc->ctrl = TXBUF_USED;
+       macb->dummy_desc->addr = 0;
+       flush_dcache_range(macb->dummy_desc_dma, macb->dummy_desc_dma +
+                       MACB_TX_DUMMY_DMA_DESC_SIZE);
+
+       for (i = 1; i < num_queues; i++)
+               gem_writel_queue_TBQP(macb, macb->dummy_desc_dma, i - 1);
+
+       return 0;
+}
+
 static int macb_init(struct eth_device *netdev, bd_t *bd)
 {
        struct macb_device *macb = to_macb(netdev);
@@ -566,6 +610,9 @@ static int macb_init(struct eth_device *netdev, bd_t *bd)
        macb_writel(macb, TBQP, macb->tx_ring_dma);
 
        if (macb_is_gem(macb)) {
+               /* Check the multi queue and initialize the queue for tx */
+               gmac_init_multi_queues(macb);
+
                /*
                 * When the GMAC IP with GE feature, this bit is used to
                 * select interface between RGMII and GMII.
@@ -594,14 +641,6 @@ static int macb_init(struct eth_device *netdev, bd_t *bd)
 #endif /* CONFIG_RMII */
        }
 
-       /* update the ethaddr */
-       if (is_valid_ethaddr(netdev->enetaddr)) {
-               macb_write_hwaddr(netdev);
-       } else {
-               printf("%s: mac address is not valid\n", netdev->name);
-               return -1;
-       }
-
        if (!macb_phy_init(macb))
                return -1;
 
@@ -721,6 +760,8 @@ int macb_eth_initialize(int id, void *regs, unsigned int phy_addr)
                                           &macb->rx_ring_dma);
        macb->tx_ring = dma_alloc_coherent(MACB_TX_DMA_DESC_SIZE,
                                           &macb->tx_ring_dma);
+       macb->dummy_desc = dma_alloc_coherent(MACB_TX_DUMMY_DMA_DESC_SIZE,
+                                          &macb->dummy_desc_dma);
 
        /* TODO: we need check the rx/tx_ring_dma is dcache line aligned */