* (C) Copyright 2007
* Daniel Hellstrom, Gaisler Research, daniel@gaisler.com
*
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier: GPL-2.0+
*/
/* #define DEBUG */
#include <common.h>
#include <command.h>
+#include <errno.h>
#include <net.h>
#include <netdev.h>
#include <malloc.h>
#include <ambapp.h>
#include <asm/leon.h>
-#include "greth.h"
+#include <grlib/greth.h>
/* Default to 3s timeout on autonegotiation */
#ifndef GRETH_PHY_TIMEOUT_MS
#define GRETH_PHY_TIMEOUT_MS 3000
#endif
+/* Default to PHY adrress 0 not not specified */
+#ifdef CONFIG_SYS_GRLIB_GRETH_PHYADDR
+#define GRETH_PHY_ADR_DEFAULT CONFIG_SYS_GRLIB_GRETH_PHYADDR
+#else
+#define GRETH_PHY_ADR_DEFAULT 0
+#endif
+
+/* Let board select which GRETH to use as network interface, set
+ * this to zero if only one GRETH is available.
+ */
+#ifndef CONFIG_SYS_GRLIB_GRETH_INDEX
+#define CONFIG_SYS_GRLIB_GRETH_INDEX 0
+#endif
+
/* ByPass Cache when reading regs */
#define GRETH_REGLOAD(addr) SPARC_NOCACHE_READ(addr)
/* Write-through cache ==> no bypassing needed on writes */
} greth_priv;
/* Read MII register 'addr' from core 'regs' */
-static int read_mii(int addr, volatile greth_regs * regs)
+static int read_mii(int phyaddr, int regaddr, volatile greth_regs * regs)
{
while (GRETH_REGLOAD(®s->mdio) & GRETH_MII_BUSY) {
}
- GRETH_REGSAVE(®s->mdio, (0 << 11) | ((addr & 0x1F) << 6) | 2);
+ GRETH_REGSAVE(®s->mdio, ((phyaddr & 0x1F) << 11) | ((regaddr & 0x1F) << 6) | 2);
while (GRETH_REGLOAD(®s->mdio) & GRETH_MII_BUSY) {
}
}
}
-static void write_mii(int addr, int data, volatile greth_regs * regs)
+static void write_mii(int phyaddr, int regaddr, int data, volatile greth_regs * regs)
{
while (GRETH_REGLOAD(®s->mdio) & GRETH_MII_BUSY) {
}
GRETH_REGSAVE(®s->mdio,
- ((data & 0xFFFF) << 16) | (0 << 11) | ((addr & 0x1F) << 6)
- | 1);
+ ((data & 0xFFFF) << 16) | ((phyaddr & 0x1F) << 11) |
+ ((regaddr & 0x1F) << 6) | 1);
while (GRETH_REGLOAD(®s->mdio) & GRETH_MII_BUSY) {
}
debug("greth_init\n");
+ /* Reset core */
+ GRETH_REGSAVE(®s->control, (GRETH_RESET | (greth->gb << 8) |
+ (greth->sp << 7) | (greth->fd << 4)));
+
+ /* Wait for Reset to complete */
+ while ( GRETH_REGLOAD(®s->control) & GRETH_RESET) ;
+
+ GRETH_REGSAVE(®s->control,
+ ((greth->gb << 8) | (greth->sp << 7) | (greth->fd << 4)));
+
if (!greth->rxbd_base) {
/* allocate descriptors */
greth->rxbd_base = (greth_bd *)
memalign(0x1000, GRETH_RXBD_CNT * sizeof(greth_bd));
greth->txbd_base = (greth_bd *)
- memalign(0x1000, GRETH_RXBD_CNT * sizeof(greth_bd));
+ memalign(0x1000, GRETH_TXBD_CNT * sizeof(greth_bd));
/* allocate buffers to all descriptors */
greth->rxbuf_base =
for (i = 0; i < GRETH_TXBD_CNT; i++) {
greth->txbd_base[i].addr = 0;
/* enable desciptor & set wrap bit if last descriptor */
- if (i >= (GRETH_RXBD_CNT - 1)) {
+ if (i >= (GRETH_TXBD_CNT - 1)) {
greth->txbd_base[i].stat = GRETH_BD_WR;
} else {
greth->txbd_base[i].stat = 0;
greth_regs *regs = dev->regs;
int tmp, tmp1, tmp2, i;
unsigned int start, timeout;
+ int phyaddr = GRETH_PHY_ADR_DEFAULT;
+
+#ifndef CONFIG_SYS_GRLIB_GRETH_PHYADDR
+ /* If BSP doesn't provide a hardcoded PHY address the driver will
+ * try to autodetect PHY address by stopping the search on the first
+ * PHY address which has REG0 implemented.
+ */
+ for (i=0; i<32; i++) {
+ tmp = read_mii(i, 0, regs);
+ if ( (tmp != 0) && (tmp != 0xffff) ) {
+ phyaddr = i;
+ break;
+ }
+ }
+#endif
+
+ /* Save PHY Address */
+ dev->phyaddr = phyaddr;
+
+ debug("GRETH PHY ADDRESS: %d\n", phyaddr);
/* X msecs to ticks */
- timeout = usec2ticks(GRETH_PHY_TIMEOUT_MS * 1000);
+ timeout = GRETH_PHY_TIMEOUT_MS * 1000;
/* Get system timer0 current value
* Total timeout is 5s
/* get phy control register default values */
- while ((tmp = read_mii(0, regs)) & 0x8000) {
- if (get_timer(start) > timeout)
+ while ((tmp = read_mii(phyaddr, 0, regs)) & 0x8000) {
+ if (get_timer(start) > timeout) {
+ debug("greth_init_phy: PHY read 1 failed\n");
return 1; /* Fail */
+ }
}
/* reset PHY and wait for completion */
- write_mii(0, 0x8000 | tmp, regs);
+ write_mii(phyaddr, 0, 0x8000 | tmp, regs);
- while (((tmp = read_mii(0, regs))) & 0x8000) {
- if (get_timer(start) > timeout)
+ while (((tmp = read_mii(phyaddr, 0, regs))) & 0x8000) {
+ if (get_timer(start) > timeout) {
+ debug("greth_init_phy: PHY read 2 failed\n");
return 1; /* Fail */
+ }
}
/* Check if PHY is autoneg capable and then determine operating
dev->sp = 0;
dev->auto_neg = 0;
if (!((tmp >> 12) & 1)) {
- write_mii(0, 0, regs);
+ write_mii(phyaddr, 0, 0, regs);
} else {
/* wait for auto negotiation to complete and then check operating mode */
dev->auto_neg = 1;
i = 0;
- while (!(((tmp = read_mii(1, regs)) >> 5) & 1)) {
+ while (!(((tmp = read_mii(phyaddr, 1, regs)) >> 5) & 1)) {
if (get_timer(start) > timeout) {
printf("Auto negotiation timed out. "
"Selecting default config\n");
- tmp = read_mii(0, regs);
+ tmp = read_mii(phyaddr, 0, regs);
dev->gb = ((tmp >> 6) & 1)
&& !((tmp >> 13) & 1);
dev->sp = !((tmp >> 6) & 1)
}
}
if ((tmp >> 8) & 1) {
- tmp1 = read_mii(9, regs);
- tmp2 = read_mii(10, regs);
+ tmp1 = read_mii(phyaddr, 9, regs);
+ tmp2 = read_mii(phyaddr, 10, regs);
if ((tmp1 & GRETH_MII_EXTADV_1000FD) &&
(tmp2 & GRETH_MII_EXTPRT_1000FD)) {
dev->gb = 1;
}
}
if ((dev->gb == 0) || ((dev->gb == 1) && (dev->gbit_mac == 0))) {
- tmp1 = read_mii(4, regs);
- tmp2 = read_mii(5, regs);
+ tmp1 = read_mii(phyaddr, 4, regs);
+ tmp2 = read_mii(phyaddr, 5, regs);
if ((tmp1 & GRETH_MII_100TXFD) &&
(tmp2 & GRETH_MII_100TXFD)) {
dev->sp = 1;
if ((dev->gb == 1) && (dev->gbit_mac == 0)) {
dev->gb = 0;
dev->fd = 0;
- write_mii(0, dev->sp << 13, regs);
+ write_mii(phyaddr, 0, dev->sp << 13, regs);
}
}
%d Mbps %s duplex\n", dev->gbit_mac ? "10/100/1000" : "10/100", (unsigned int)(regs), (unsigned int)(dev->irq), dev->gb ? 1000 : (dev->sp ? 100 : 10), dev->fd ? "full" : "half");
/* Read out PHY info if extended registers are available */
if (tmp & 1) {
- tmp1 = read_mii(2, regs);
- tmp2 = read_mii(3, regs);
+ tmp1 = read_mii(phyaddr, 2, regs);
+ tmp2 = read_mii(phyaddr, 3, regs);
tmp1 = (tmp1 << 6) | ((tmp2 >> 10) & 0x3F);
tmp = tmp2 & 0xF;
}
}
-int greth_send(struct eth_device *dev, volatile void *eth_data, int data_length)
+int greth_send(struct eth_device *dev, void *eth_data, int data_length)
{
greth_priv *greth = dev->priv;
greth_regs *regs = greth->regs;
greth_regs *regs = greth->regs;
greth_bd *rxbd;
unsigned int status, len = 0, bad;
- unsigned char *d;
+ char *d;
int enable = 0;
int i;
goto done;
}
- debug("greth_recv: packet 0x%lx, 0x%lx, len: %d\n",
+ debug("greth_recv: packet 0x%x, 0x%x, len: %d\n",
(unsigned int)rxbd, status, status & GRETH_BD_LEN);
/* Check status for errors.
for (i = 0; i < GRETH_RXBD_CNT; i++) {
printf("[%d]: Stat=0x%lx, Addr=0x%lx\n", i,
GRETH_REGLOAD(&greth->rxbd_base[i].stat),
- GRETH_REGLOAD(&greth->rxbd_base[i].
- addr));
+ GRETH_REGLOAD(&greth->rxbd_base[i].addr));
}
} else {
/* Process the incoming packet. */
sparc_dcache_flush_all();
/* pass packet on to network subsystem */
- NetReceive((void *)d, len);
+ net_process_received_packet((void *)d, len);
/* bump stats counters */
greth->stats.rx_packets++;
(unsigned int)greth->rxbd_max) ? greth->
rxbd_base : (greth->rxbd_curr + 1);
- };
+ }
if (enable) {
GRETH_REGORIN(®s->control, GRETH_RXEN);
}
done:
- /* return positive length of packet or 0 if non recieved */
+ /* return positive length of packet or 0 if non received */
return len;
}
debug("Scanning for GRETH\n");
- /* Find Device & IRQ via AMBA Plug&Play information */
- if (ambapp_apb_first(VENDOR_GAISLER, GAISLER_ETHMAC, &apbdev) != 1) {
+ /* Find Device & IRQ via AMBA Plug&Play information,
+ * CONFIG_SYS_GRLIB_GRETH_INDEX select which GRETH if multiple
+ * GRETHs in system.
+ */
+ if (ambapp_apb_find(&ambapp_plb, VENDOR_GAISLER, GAISLER_ETHMAC,
+ CONFIG_SYS_GRLIB_GRETH_INDEX, &apbdev) != 1) {
return -1; /* GRETH not found */
}
greth->regs = (greth_regs *) apbdev.address;
greth->irq = apbdev.irq;
- debug("Found GRETH at 0x%lx, irq %d\n", greth->regs, greth->irq);
+ debug("Found GRETH at %p, irq %d\n", greth->regs, greth->irq);
dev->priv = (void *)greth;
dev->iobase = (unsigned int)greth->regs;
dev->init = greth_init;
/* Make descriptor string */
if (greth->gbit_mac) {
- sprintf(dev->name, "GRETH 10/100/GB");
+ strcpy(dev->name, "GRETH_10/100/GB");
} else {
- sprintf(dev->name, "GRETH 10/100");
+ strcpy(dev->name, "GRETH_10/100");
}
/* initiate PHY, select speed/duplex depending on connected PHY */
if (greth_init_phy(greth, bis)) {
/* Failed to init PHY (timedout) */
+ debug("GRETH[%p]: Failed to init PHY\n", greth->regs);
return -1;
}
}
}
} else {
- /* HW Address not found in environment, Set default HW address */
- addr[0] = GRETH_HWADDR_0; /* MSB */
- addr[1] = GRETH_HWADDR_1;
- addr[2] = GRETH_HWADDR_2;
- addr[3] = GRETH_HWADDR_3;
- addr[4] = GRETH_HWADDR_4;
- addr[5] = GRETH_HWADDR_5; /* LSB */
+ /* No ethaddr set */
+ return -EINVAL;
}
/* set and remember MAC address */
greth_set_hwaddr(greth, addr);
+ debug("GRETH[%p]: Initialized successfully\n", greth->regs);
return 0;
}
projects / oweals / u-boot.git / blobdiff