/*
* Copyright 2014 Freescale Semiconductor, Inc.
* Copyright 2017 NXP
+ * Copyright 2017-2018 NXP
*/
#include <common.h>
#include <errno.h>
#define MC_BOOT_ENV_VAR "mcinitcmd"
DECLARE_GLOBAL_DATA_PTR;
+static int mc_memset_resv_ram;
static int mc_boot_status = -1;
static int mc_dpl_applied = -1;
#ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
for (i = WRIOP1_DPMAC1; i < NUM_WRIOP_PORTS; i++) {
/* port not enabled */
- if ((wriop_is_enabled_dpmac(i) != 1) ||
- (wriop_get_phy_address(i) == -1))
+ if (wriop_is_enabled_dpmac(i) != 1)
continue;
snprintf(ethname, ETH_NAME_LEN, "DPMAC%d@%s", i,
{
size_t mc_ram_size = mc_get_dram_block_size();
+ if (!mc_memset_resv_ram || (get_mc_boot_status() < 0)) {
+ mc_memset_resv_ram = 1;
+ memset((void *)gd->arch.resv_ram, 0, mc_ram_size);
+ }
+
return (gd->arch.resv_ram + mc_ram_size - 1) &
MC_RAM_BASE_ADDR_ALIGNMENT_MASK;
}
int i;
for (i = WRIOP1_DPMAC1; i < NUM_WRIOP_PORTS; i++)
- if ((wriop_is_enabled_dpmac(i) == 1) &&
- (wriop_get_phy_address(i) != -1))
+ if (wriop_is_enabled_dpmac(i) == 1)
ldpaa_eth_init(i, wriop_get_enet_if(i));
return 0;
}