serial: add BCM283x mini UART driver

[oweals/u-boot.git] / drivers / net / designware.c

diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index a6c39c39ffaaee82f40f31dbf6c9ada59b3ce745..ca58f34f13bf9af6e62fd9b1760a8ccfdac688b7 100644 (file)
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -22,10 +22,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#if !defined(CONFIG_PHYLIB)
-# error "DesignWare Ether MAC requires PHYLIB - missing CONFIG_PHYLIB"
-#endif
-
 static int dw_mdio_read(struct mii_dev *bus, int addr, int devad, int reg)
 {
        struct eth_mac_regs *mac_p = bus->priv;
@@ -85,7 +81,7 @@ static int dw_mdio_init(const char *name, struct eth_mac_regs *mac_regs_p)
 
        bus->read = dw_mdio_read;
        bus->write = dw_mdio_write;
-       snprintf(bus->name, sizeof(bus->name), name);
+       snprintf(bus->name, sizeof(bus->name), "%s", name);
 
        bus->priv = (void *)mac_regs_p;
 
@@ -107,8 +103,8 @@ static void tx_descs_init(struct dw_eth_dev *priv)
 
 #if defined(CONFIG_DW_ALTDESCRIPTOR)
                desc_p->txrx_status &= ~(DESC_TXSTS_TXINT | DESC_TXSTS_TXLAST |
-                               DESC_TXSTS_TXFIRST | DESC_TXSTS_TXCRCDIS | \
-                               DESC_TXSTS_TXCHECKINSCTRL | \
+                               DESC_TXSTS_TXFIRST | DESC_TXSTS_TXCRCDIS |
+                               DESC_TXSTS_TXCHECKINSCTRL |
                                DESC_TXSTS_TXRINGEND | DESC_TXSTS_TXPADDIS);
 
                desc_p->txrx_status |= DESC_TXSTS_TXCHAIN;
@@ -155,7 +151,7 @@ static void rx_descs_init(struct dw_eth_dev *priv)
                desc_p->dmamac_next = &desc_table_p[idx + 1];
 
                desc_p->dmamac_cntl =
-                       (MAC_MAX_FRAME_SZ & DESC_RXCTRL_SIZE1MASK) | \
+                       (MAC_MAX_FRAME_SZ & DESC_RXCTRL_SIZE1MASK) |
                                      DESC_RXCTRL_RXCHAIN;
 
                desc_p->txrx_status = DESC_RXSTS_OWNBYDMA;
@@ -200,6 +196,8 @@ static void dw_adjust_link(struct eth_mac_regs *mac_p,
 
        if (phydev->speed != 1000)
                conf |= MII_PORTSELECT;
+       else
+               conf &= ~MII_PORTSELECT;
 
        if (phydev->speed == 100)
                conf |= FES_100;
@@ -321,14 +319,14 @@ static int _dw_eth_send(struct dw_eth_dev *priv, void *packet, int length)
 
 #if defined(CONFIG_DW_ALTDESCRIPTOR)
        desc_p->txrx_status |= DESC_TXSTS_TXFIRST | DESC_TXSTS_TXLAST;
-       desc_p->dmamac_cntl |= (length << DESC_TXCTRL_SIZE1SHFT) & \
+       desc_p->dmamac_cntl |= (length << DESC_TXCTRL_SIZE1SHFT) &
                               DESC_TXCTRL_SIZE1MASK;
 
        desc_p->txrx_status &= ~(DESC_TXSTS_MSK);
        desc_p->txrx_status |= DESC_TXSTS_OWNBYDMA;
 #else
-       desc_p->dmamac_cntl |= ((length << DESC_TXCTRL_SIZE1SHFT) & \
-                              DESC_TXCTRL_SIZE1MASK) | DESC_TXCTRL_TXLAST | \
+       desc_p->dmamac_cntl |= ((length << DESC_TXCTRL_SIZE1SHFT) &
+                              DESC_TXCTRL_SIZE1MASK) | DESC_TXCTRL_TXLAST |
                               DESC_TXCTRL_TXFIRST;
 
        desc_p->txrx_status = DESC_TXSTS_OWNBYDMA;
@@ -368,7 +366,7 @@ static int _dw_eth_recv(struct dw_eth_dev *priv, uchar **packetp)
        /* Check  if the owner is the CPU */
        if (!(status & DESC_RXSTS_OWNBYDMA)) {
 
-               length = (status & DESC_RXSTS_FRMLENMSK) >> \
+               length = (status & DESC_RXSTS_FRMLENMSK) >>
                         DESC_RXSTS_FRMLENSHFT;
 
                /* Invalidate received data */
@@ -408,7 +406,7 @@ static int _dw_free_pkt(struct dw_eth_dev *priv)
 static int dw_phy_init(struct dw_eth_dev *priv, void *dev)
 {
        struct phy_device *phydev;
-       int mask = 0xffffffff;
+       int mask = 0xffffffff, ret;
 
 #ifdef CONFIG_PHY_ADDR
        mask = 1 << CONFIG_PHY_ADDR;
@@ -421,6 +419,11 @@ static int dw_phy_init(struct dw_eth_dev *priv, void *dev)
        phy_connect_dev(phydev, dev);
 
        phydev->supported &= PHY_GBIT_FEATURES;
+       if (priv->max_speed) {
+               ret = phy_set_supported(phydev, priv->max_speed);
+               if (ret)
+                       return ret;
+       }
        phydev->advertising = phydev->supported;
 
        priv->phydev = phydev;
@@ -588,11 +591,9 @@ static int designware_eth_probe(struct udevice *dev)
         * or via a PCI bridge, fill in platdata before we probe the hardware.
         */
        if (device_is_on_pci_bus(dev)) {
-               pci_dev_t bdf = pci_get_bdf(dev);
-
                dm_pci_read_config32(dev, PCI_BASE_ADDRESS_0, &iobase);
                iobase &= PCI_BASE_ADDRESS_MEM_MASK;
-               iobase = pci_mem_to_phys(bdf, iobase);
+               iobase = dm_pci_mem_to_phys(dev, iobase);
 
                pdata->iobase = iobase;
                pdata->phy_interface = PHY_INTERFACE_MODE_RMII;
@@ -603,6 +604,7 @@ static int designware_eth_probe(struct udevice *dev)
        priv->mac_regs_p = (struct eth_mac_regs *)iobase;
        priv->dma_regs_p = (struct eth_dma_regs *)(iobase + DW_DMA_BASE_OFFSET);
        priv->interface = pdata->phy_interface;
+       priv->max_speed = pdata->max_speed;
 
        dw_mdio_init(dev->name, priv->mac_regs_p);
        priv->bus = miiphy_get_dev_by_name(dev->name);
@@ -637,6 +639,7 @@ static int designware_eth_ofdata_to_platdata(struct udevice *dev)
 {
        struct eth_pdata *pdata = dev_get_platdata(dev);
        const char *phy_mode;
+       const fdt32_t *cell;
 
        pdata->iobase = dev_get_addr(dev);
        pdata->phy_interface = -1;
@@ -648,6 +651,11 @@ static int designware_eth_ofdata_to_platdata(struct udevice *dev)
                return -EINVAL;
        }
 
+       pdata->max_speed = 0;
+       cell = fdt_getprop(gd->fdt_blob, dev->of_offset, "max-speed", NULL);
+       if (cell)
+               pdata->max_speed = fdt32_to_cpu(*cell);
+
        return 0;
 }