Revert "ARM64: zynqmp: Added broken-tuning property to SD, eMMC nodes"
[oweals/u-boot.git] / drivers / net / designware.c
index 14dd7b83494091855b2e204b0e5e7335e7def1f1..9e6d7261844323827039cc2ad7c4bf0b0d2cd3ec 100644 (file)
@@ -80,7 +80,7 @@ static int dw_mdio_write(struct mii_dev *bus, int addr, int devad, int reg,
        return ret;
 }
 
-#if CONFIG_DM_ETH
+#if defined(CONFIG_DM_ETH) && defined(CONFIG_DM_GPIO)
 static int dw_mdio_reset(struct mii_dev *bus)
 {
        struct udevice *dev = bus->priv;
@@ -126,7 +126,7 @@ static int dw_mdio_init(const char *name, void *priv)
        bus->read = dw_mdio_read;
        bus->write = dw_mdio_write;
        snprintf(bus->name, sizeof(bus->name), "%s", name);
-#ifdef CONFIG_DM_ETH
+#if defined(CONFIG_DM_ETH) && defined(CONFIG_DM_GPIO)
        bus->reset = dw_mdio_reset;
 #endif
 
@@ -145,8 +145,8 @@ static void tx_descs_init(struct dw_eth_dev *priv)
 
        for (idx = 0; idx < CONFIG_TX_DESCR_NUM; idx++) {
                desc_p = &desc_table_p[idx];
-               desc_p->dmamac_addr = &txbuffs[idx * CONFIG_ETH_BUFSIZE];
-               desc_p->dmamac_next = &desc_table_p[idx + 1];
+               desc_p->dmamac_addr = (ulong)&txbuffs[idx * CONFIG_ETH_BUFSIZE];
+               desc_p->dmamac_next = (ulong)&desc_table_p[idx + 1];
 
 #if defined(CONFIG_DW_ALTDESCRIPTOR)
                desc_p->txrx_status &= ~(DESC_TXSTS_TXINT | DESC_TXSTS_TXLAST |
@@ -164,11 +164,11 @@ static void tx_descs_init(struct dw_eth_dev *priv)
        }
 
        /* Correcting the last pointer of the chain */
-       desc_p->dmamac_next = &desc_table_p[0];
+       desc_p->dmamac_next = (ulong)&desc_table_p[0];
 
        /* Flush all Tx buffer descriptors at once */
-       flush_dcache_range((unsigned int)priv->tx_mac_descrtable,
-                          (unsigned int)priv->tx_mac_descrtable +
+       flush_dcache_range((ulong)priv->tx_mac_descrtable,
+                          (ulong)priv->tx_mac_descrtable +
                           sizeof(priv->tx_mac_descrtable));
 
        writel((ulong)&desc_table_p[0], &dma_p->txdesclistaddr);
@@ -189,13 +189,12 @@ static void rx_descs_init(struct dw_eth_dev *priv)
         * Otherwise there's a chance to get some of them flushed in RAM when
         * GMAC is already pushing data to RAM via DMA. This way incoming from
         * GMAC data will be corrupted. */
-       flush_dcache_range((unsigned int)rxbuffs, (unsigned int)rxbuffs +
-                          RX_TOTAL_BUFSIZE);
+       flush_dcache_range((ulong)rxbuffs, (ulong)rxbuffs + RX_TOTAL_BUFSIZE);
 
        for (idx = 0; idx < CONFIG_RX_DESCR_NUM; idx++) {
                desc_p = &desc_table_p[idx];
-               desc_p->dmamac_addr = &rxbuffs[idx * CONFIG_ETH_BUFSIZE];
-               desc_p->dmamac_next = &desc_table_p[idx + 1];
+               desc_p->dmamac_addr = (ulong)&rxbuffs[idx * CONFIG_ETH_BUFSIZE];
+               desc_p->dmamac_next = (ulong)&desc_table_p[idx + 1];
 
                desc_p->dmamac_cntl =
                        (MAC_MAX_FRAME_SZ & DESC_RXCTRL_SIZE1MASK) |
@@ -205,11 +204,11 @@ static void rx_descs_init(struct dw_eth_dev *priv)
        }
 
        /* Correcting the last pointer of the chain */
-       desc_p->dmamac_next = &desc_table_p[0];
+       desc_p->dmamac_next = (ulong)&desc_table_p[0];
 
        /* Flush all Rx buffer descriptors at once */
-       flush_dcache_range((unsigned int)priv->rx_mac_descrtable,
-                          (unsigned int)priv->rx_mac_descrtable +
+       flush_dcache_range((ulong)priv->rx_mac_descrtable,
+                          (ulong)priv->rx_mac_descrtable +
                           sizeof(priv->rx_mac_descrtable));
 
        writel((ulong)&desc_table_p[0], &dma_p->rxdesclistaddr);
@@ -337,12 +336,11 @@ static int _dw_eth_send(struct dw_eth_dev *priv, void *packet, int length)
        struct eth_dma_regs *dma_p = priv->dma_regs_p;
        u32 desc_num = priv->tx_currdescnum;
        struct dmamacdescr *desc_p = &priv->tx_mac_descrtable[desc_num];
-       uint32_t desc_start = (uint32_t)desc_p;
-       uint32_t desc_end = desc_start +
+       ulong desc_start = (ulong)desc_p;
+       ulong desc_end = desc_start +
                roundup(sizeof(*desc_p), ARCH_DMA_MINALIGN);
-       uint32_t data_start = (uint32_t)desc_p->dmamac_addr;
-       uint32_t data_end = data_start +
-               roundup(length, ARCH_DMA_MINALIGN);
+       ulong data_start = desc_p->dmamac_addr;
+       ulong data_end = data_start + roundup(length, ARCH_DMA_MINALIGN);
        /*
         * Strictly we only need to invalidate the "txrx_status" field
         * for the following check, but on some platforms we cannot
@@ -359,7 +357,7 @@ static int _dw_eth_send(struct dw_eth_dev *priv, void *packet, int length)
                return -EPERM;
        }
 
-       memcpy(desc_p->dmamac_addr, packet, length);
+       memcpy((void *)data_start, packet, length);
 
        /* Flush data to be sent */
        flush_dcache_range(data_start, data_end);
@@ -399,11 +397,11 @@ static int _dw_eth_recv(struct dw_eth_dev *priv, uchar **packetp)
        u32 status, desc_num = priv->rx_currdescnum;
        struct dmamacdescr *desc_p = &priv->rx_mac_descrtable[desc_num];
        int length = -EAGAIN;
-       uint32_t desc_start = (uint32_t)desc_p;
-       uint32_t desc_end = desc_start +
+       ulong desc_start = (ulong)desc_p;
+       ulong desc_end = desc_start +
                roundup(sizeof(*desc_p), ARCH_DMA_MINALIGN);
-       uint32_t data_start = (uint32_t)desc_p->dmamac_addr;
-       uint32_t data_end;
+       ulong data_start = desc_p->dmamac_addr;
+       ulong data_end;
 
        /* Invalidate entire buffer descriptor */
        invalidate_dcache_range(desc_start, desc_end);
@@ -419,7 +417,7 @@ static int _dw_eth_recv(struct dw_eth_dev *priv, uchar **packetp)
                /* Invalidate received data */
                data_end = data_start + roundup(length, ARCH_DMA_MINALIGN);
                invalidate_dcache_range(data_start, data_end);
-               *packetp = desc_p->dmamac_addr;
+               *packetp = (uchar *)(ulong)desc_p->dmamac_addr;
        }
 
        return length;
@@ -429,8 +427,8 @@ static int _dw_free_pkt(struct dw_eth_dev *priv)
 {
        u32 desc_num = priv->rx_currdescnum;
        struct dmamacdescr *desc_p = &priv->rx_mac_descrtable[desc_num];
-       uint32_t desc_start = (uint32_t)desc_p;
-       uint32_t desc_end = desc_start +
+       ulong desc_start = (ulong)desc_p;
+       ulong desc_end = desc_start +
                roundup(sizeof(*desc_p), ARCH_DMA_MINALIGN);
 
        /*
@@ -535,6 +533,11 @@ int designware_initialize(ulong base_addr, u32 interface)
                return -ENOMEM;
        }
 
+       if ((phys_addr_t)priv + sizeof(*priv) > (1ULL << 32)) {
+               printf("designware: buffers are outside DMA memory\n");
+               return -EINVAL;
+       }
+
        memset(dev, 0, sizeof(struct eth_device));
        memset(priv, 0, sizeof(struct dw_eth_dev));
 
@@ -630,6 +633,7 @@ static int designware_eth_probe(struct udevice *dev)
        struct eth_pdata *pdata = dev_get_platdata(dev);
        struct dw_eth_dev *priv = dev_get_priv(dev);
        u32 iobase = pdata->iobase;
+       ulong ioaddr;
        int ret;
 
 #ifdef CONFIG_DM_PCI
@@ -648,8 +652,9 @@ static int designware_eth_probe(struct udevice *dev)
 #endif
 
        debug("%s, iobase=%x, priv=%p\n", __func__, iobase, priv);
-       priv->mac_regs_p = (struct eth_mac_regs *)iobase;
-       priv->dma_regs_p = (struct eth_dma_regs *)(iobase + DW_DMA_BASE_OFFSET);
+       ioaddr = iobase;
+       priv->mac_regs_p = (struct eth_mac_regs *)ioaddr;
+       priv->dma_regs_p = (struct eth_dma_regs *)(ioaddr + DW_DMA_BASE_OFFSET);
        priv->interface = pdata->phy_interface;
        priv->max_speed = pdata->max_speed;
 
@@ -685,11 +690,15 @@ static const struct eth_ops designware_eth_ops = {
 static int designware_eth_ofdata_to_platdata(struct udevice *dev)
 {
        struct dw_eth_pdata *dw_pdata = dev_get_platdata(dev);
+#ifdef CONFIG_DM_GPIO
        struct dw_eth_dev *priv = dev_get_priv(dev);
+#endif
        struct eth_pdata *pdata = &dw_pdata->eth_pdata;
        const char *phy_mode;
        const fdt32_t *cell;
+#ifdef CONFIG_DM_GPIO
        int reset_flags = GPIOD_IS_OUT;
+#endif
        int ret = 0;
 
        pdata->iobase = dev_get_addr(dev);
@@ -707,6 +716,7 @@ static int designware_eth_ofdata_to_platdata(struct udevice *dev)
        if (cell)
                pdata->max_speed = fdt32_to_cpu(*cell);
 
+#ifdef CONFIG_DM_GPIO
        if (fdtdec_get_bool(gd->fdt_blob, dev->of_offset,
                            "snps,reset-active-low"))
                reset_flags |= GPIOD_ACTIVE_LOW;
@@ -719,6 +729,7 @@ static int designware_eth_ofdata_to_platdata(struct udevice *dev)
        } else if (ret == -ENOENT) {
                ret = 0;
        }
+#endif
 
        return ret;
 }
@@ -726,6 +737,7 @@ static int designware_eth_ofdata_to_platdata(struct udevice *dev)
 static const struct udevice_id designware_eth_ids[] = {
        { .compatible = "allwinner,sun7i-a20-gmac" },
        { .compatible = "altr,socfpga-stmmac" },
+       { .compatible = "amlogic,meson6-dwmac" },
        { }
 };