if (tmp & MDIO_USERACCESS0_ACK) {
*data = tmp & 0xffff;
- return 0;
+ return 1;
}
- return -EIO;
+ return 0;
}
/* Write to a PHY register via MDIO inteface. Blocks until operation is complete. */
while (readl(&adap_mdio->USERACCESS0) & MDIO_USERACCESS0_GO)
;
- return 0;
+ return 1;
}
/* PHY functions for a generic PHY */
{
unsigned short value = 0;
int retval = davinci_eth_phy_read(addr, reg, &value);
- if (retval < 0)
- return retval;
- return value;
+
+ return retval ? value : -EIO;
}
static int davinci_mii_phy_write(struct mii_dev *bus, int addr, int devad,
int reg, u16 value)
{
- return davinci_eth_phy_write(addr, reg, value);
+ return davinci_eth_phy_write(addr, reg, value) ? 0 : 1;
}
#endif
printf ("WARN: emac_rcv_pkt: Error in packet\n");
} else {
unsigned long tmp = (unsigned long)rx_curr_desc->buffer;
+ unsigned short len =
+ rx_curr_desc->buff_off_len & 0xffff;
- invalidate_dcache_range(tmp, tmp + EMAC_RXBUF_SIZE);
- net_process_received_packet(
- rx_curr_desc->buffer,
- rx_curr_desc->buff_off_len & 0xffff);
- ret = rx_curr_desc->buff_off_len & 0xffff;
+ invalidate_dcache_range(tmp, tmp + ALIGN(len, PKTALIGN));
+ net_process_received_packet(rx_curr_desc->buffer, len);
+ ret = len;
}
/* Ack received packet descriptor */