#include <post.h>
#endif
-#undef DEBUG_ETHERNET
-
-#ifdef DEBUG_ETHERNET
-#define DEBUGF(fmt, args...) printf(fmt, ##args)
-#else
-#define DEBUGF(fmt, args...)
-#endif
-
#define RXBUF_BASE_ADDR 0xFF900000
#define TXBUF_BASE_ADDR 0xFF800000
#define TX_BUF_CNT 1
#define TOUT_LOOP 1000000
-ADI_ETHER_BUFFER *txbuf[TX_BUF_CNT];
-ADI_ETHER_BUFFER *rxbuf[PKTBUFSRX];
+static ADI_ETHER_BUFFER *txbuf[TX_BUF_CNT];
+static ADI_ETHER_BUFFER *rxbuf[PKTBUFSRX];
static u16 txIdx; /* index of the current RX buffer */
static u16 rxIdx; /* index of the current TX buffer */
/* DMAx_CONFIG values at DMA Restart */
-const ADI_DMA_CONFIG_REG rxdmacfg = {
- .b_DMA_EN = 1, /* enabled */
- .b_WNR = 1, /* write to memory */
- .b_WDSIZE = 2, /* wordsize is 32 bits */
- .b_DMA2D = 0,
- .b_RESTART = 0,
- .b_DI_SEL = 0,
- .b_DI_EN = 0, /* no interrupt */
- .b_NDSIZE = 5, /* 5 half words is desc size */
- .b_FLOW = 7 /* large desc flow */
-};
-
-const ADI_DMA_CONFIG_REG txdmacfg = {
- .b_DMA_EN = 1, /* enabled */
- .b_WNR = 0, /* read from memory */
- .b_WDSIZE = 2, /* wordsize is 32 bits */
- .b_DMA2D = 0,
- .b_RESTART = 0,
- .b_DI_SEL = 0,
- .b_DI_EN = 0, /* no interrupt */
- .b_NDSIZE = 5, /* 5 half words is desc size */
- .b_FLOW = 7 /* large desc flow */
+static const union {
+ u16 data;
+ ADI_DMA_CONFIG_REG reg;
+} txdmacfg = {
+ .reg = {
+ .b_DMA_EN = 1, /* enabled */
+ .b_WNR = 0, /* read from memory */
+ .b_WDSIZE = 2, /* wordsize is 32 bits */
+ .b_DMA2D = 0,
+ .b_RESTART = 0,
+ .b_DI_SEL = 0,
+ .b_DI_EN = 0, /* no interrupt */
+ .b_NDSIZE = 5, /* 5 half words is desc size */
+ .b_FLOW = 7 /* large desc flow */
+ },
};
static int bfin_miiphy_wait(void)
txbuf[txIdx]->FrmData->NoBytes = length;
memcpy(txbuf[txIdx]->FrmData->Dest, (void *)packet, length);
txbuf[txIdx]->Dma[0].START_ADDR = (u32) txbuf[txIdx]->FrmData;
- *pDMA2_NEXT_DESC_PTR = &txbuf[txIdx]->Dma[0];
- *pDMA2_CONFIG = *(u16 *) (void *)(&txdmacfg);
+ *pDMA2_NEXT_DESC_PTR = txbuf[txIdx]->Dma;
+ *pDMA2_CONFIG = txdmacfg.data;
*pEMAC_OPMODE |= TE;
for (i = 0; (txbuf[txIdx]->StatusWord & TX_COMP) == 0; i++) {
else
txIdx++;
out:
- DEBUGF("BFIN EMAC send: length = %d\n", length);
+ debug("BFIN EMAC send: length = %d\n", length);
return result;
}
printf("Ethernet: bad frame\n");
break;
}
+
+ debug("%s: len = %d\n", __func__, length - 4);
+
NetRxPackets[rxIdx] =
(volatile uchar *)(rxbuf[rxIdx]->FrmData->Dest);
NetReceive(NetRxPackets[rxIdx], length - 4);
*pVR_CTL |= CLKBUFOE;
/* Set all the pins to peripheral mode */
-#ifdef CONFIG_BFIN_MAC_RMII
+#ifdef CONFIG_RMII
/* grab RMII pins */
# if defined(__ADSPBF51x__)
*pPORTF_MUX = (*pPORTF_MUX & \
u32 opmode;
int dat;
int i;
- DEBUGF("Eth_init: ......\n");
+ debug("Eth_init: ......\n");
txIdx = 0;
rxIdx = 0;
return -1;
/* Initialize EMAC address */
- bfin_EMAC_setup_addr(bd);
+ bfin_EMAC_setup_addr(dev->enetaddr);
/* Initialize TX and RX buffer */
for (i = 0; i < PKTBUFSRX; i++) {
rxbuf[i] = SetupRxBuffer(i);
if (i > 0) {
- rxbuf[i - 1]->Dma[1].NEXT_DESC_PTR =
- &(rxbuf[i]->Dma[0]);
+ rxbuf[i - 1]->Dma[1].NEXT_DESC_PTR = rxbuf[i]->Dma;
if (i == (PKTBUFSRX - 1))
- rxbuf[i]->Dma[1].NEXT_DESC_PTR =
- &(rxbuf[0]->Dma[0]);
+ rxbuf[i]->Dma[1].NEXT_DESC_PTR = rxbuf[0]->Dma;
}
}
for (i = 0; i < TX_BUF_CNT; i++) {
txbuf[i] = SetupTxBuffer(i);
if (i > 0) {
- txbuf[i - 1]->Dma[1].NEXT_DESC_PTR =
- &(txbuf[i]->Dma[0]);
+ txbuf[i - 1]->Dma[1].NEXT_DESC_PTR = txbuf[i]->Dma;
if (i == (TX_BUF_CNT - 1))
- txbuf[i]->Dma[1].NEXT_DESC_PTR =
- &(txbuf[0]->Dma[0]);
+ txbuf[i]->Dma[1].NEXT_DESC_PTR = txbuf[0]->Dma;
}
}
/* Set RX DMA */
- *pDMA1_NEXT_DESC_PTR = &rxbuf[0]->Dma[0];
- *pDMA1_CONFIG = *((u16 *) (void *)&rxbuf[0]->Dma[0].CONFIG);
+ *pDMA1_NEXT_DESC_PTR = rxbuf[0]->Dma;
+ *pDMA1_CONFIG = rxbuf[0]->Dma[0].CONFIG_DATA;
/* Wait MII done */
bfin_miiphy_wait();
else
opmode = ASTP | PSF;
opmode |= RE;
-#ifdef CONFIG_BFIN_MAC_RMII
+#ifdef CONFIG_RMII
opmode |= TE | RMII;
#endif
/* Turn on the EMAC */
static void bfin_EMAC_halt(struct eth_device *dev)
{
- DEBUGF("Eth_halt: ......\n");
+ debug("Eth_halt: ......\n");
/* Turn off the EMAC */
*pEMAC_OPMODE = 0x00000000;
/* Turn off the EMAC RX DMA */
}
-void bfin_EMAC_setup_addr(bd_t *bd)
+void bfin_EMAC_setup_addr(uchar *enetaddr)
{
*pEMAC_ADDRLO =
- bd->bi_enetaddr[0] |
- bd->bi_enetaddr[1] << 8 |
- bd->bi_enetaddr[2] << 16 |
- bd->bi_enetaddr[3] << 24;
+ enetaddr[0] |
+ enetaddr[1] << 8 |
+ enetaddr[2] << 16 |
+ enetaddr[3] << 24;
*pEMAC_ADDRHI =
- bd->bi_enetaddr[4] |
- bd->bi_enetaddr[5] << 8;
+ enetaddr[4] |
+ enetaddr[5] << 8;
}
ADI_ETHER_BUFFER *SetupRxBuffer(int no)
int nobytes_buffer = sizeof(ADI_ETHER_BUFFER[2]) / 2; /* ensure a multi. of 4 */
int total_size = nobytes_buffer + RECV_BUFSIZE;
- buf = (ADI_ETHER_BUFFER *) (RXBUF_BASE_ADDR + no * total_size);
- frmbuf =
- (ADI_ETHER_FRAME_BUFFER *) (RXBUF_BASE_ADDR + no * total_size +
- nobytes_buffer);
+ buf = (void *) (RXBUF_BASE_ADDR + no * total_size);
+ frmbuf = (void *) (RXBUF_BASE_ADDR + no * total_size + nobytes_buffer);
memset(buf, 0x00, nobytes_buffer);
buf->FrmData = frmbuf;
buf->Dma[0].CONFIG.b_FLOW = 7; /* large desc flow */
/* set up second desc to point to status word */
- buf->Dma[1].NEXT_DESC_PTR = &(buf->Dma[0]);
+ buf->Dma[1].NEXT_DESC_PTR = buf->Dma;
buf->Dma[1].START_ADDR = (u32) & buf->IPHdrChksum;
buf->Dma[1].CONFIG.b_DMA_EN = 1; /* enabled */
buf->Dma[1].CONFIG.b_WNR = 1; /* Write to memory */
int nobytes_buffer = sizeof(ADI_ETHER_BUFFER[2]) / 2; /* ensure a multi. of 4 */
int total_size = nobytes_buffer + RECV_BUFSIZE;
- buf = (ADI_ETHER_BUFFER *) (TXBUF_BASE_ADDR + no * total_size);
- frmbuf =
- (ADI_ETHER_FRAME_BUFFER *) (TXBUF_BASE_ADDR + no * total_size +
- nobytes_buffer);
+ buf = (void *) (TXBUF_BASE_ADDR + no * total_size);
+ frmbuf = (void *) (TXBUF_BASE_ADDR + no * total_size + nobytes_buffer);
memset(buf, 0x00, nobytes_buffer);
buf->FrmData = frmbuf;
projects / oweals / u-boot.git / blobdiff