dm: net: Adjust PHY interface to work with CONFIG_DM_ETH

[oweals/u-boot.git] / drivers / net / armada100_fec.c

diff --git a/drivers/net/armada100_fec.c b/drivers/net/armada100_fec.c
index ed7cf2032485839922d43efabfc781ffed8807df..e6a62525be0bcfb8ded9c358727ba8b4f4439719 100644 (file)
--- a/drivers/net/armada100_fec.c
+++ b/drivers/net/armada100_fec.c
@@ -7,23 +7,7 @@
  * Marvell Semiconductor <www.marvell.com>
  * Contributor: Mahavir Jain <mjain@marvell.com>
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
- * MA 02110-1301 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
@@ -100,7 +84,7 @@ static int smi_reg_read(const char *devname, u8 phy_addr, u8 phy_reg,
        }
 
        /* wait for the SMI register to become available */
-       if (armdfec_phy_timeout(&regs->smi, SMI_BUSY, FALSE)) {
+       if (armdfec_phy_timeout(&regs->smi, SMI_BUSY, false)) {
                printf("ARMD100 FEC: (%s) PHY busy timeout\n",  __func__);
                return -1;
        }
@@ -108,7 +92,7 @@ static int smi_reg_read(const char *devname, u8 phy_addr, u8 phy_reg,
        writel((phy_addr << 16) | (phy_reg << 21) | SMI_OP_R, &regs->smi);
 
        /* now wait for the data to be valid */
-       if (armdfec_phy_timeout(&regs->smi, SMI_R_VALID, TRUE)) {
+       if (armdfec_phy_timeout(&regs->smi, SMI_R_VALID, true)) {
                val = readl(&regs->smi);
                printf("ARMD100 FEC: (%s) PHY Read timeout, val=0x%x\n",
                                __func__, val);
@@ -143,7 +127,7 @@ static int smi_reg_write(const char *devname,
        }
 
        /* wait for the SMI register to become available */
-       if (armdfec_phy_timeout(&regs->smi, SMI_BUSY, FALSE)) {
+       if (armdfec_phy_timeout(&regs->smi, SMI_BUSY, false)) {
                printf("ARMD100 FEC: (%s) PHY busy timeout\n",  __func__);
                return -1;
        }
@@ -655,15 +639,16 @@ static int armdfec_recv(struct eth_device *dev)
        } else {
                /* !!! call higher layer processing */
                debug("ARMD100 FEC: (%s) Sending Received packet to"
-                       " upper layer (NetReceive)\n", __func__);
+                     " upper layer (net_process_received_packet)\n", __func__);
 
                /*
                 * let the upper layer handle the packet, subtract offset
                 * as two dummy bytes are added in received buffer see
                 * PORT_CONFIG_EXT register bit TWO_Byte_Stuff_Mode bit.
                 */
-               NetReceive((p_rxdesc_curr->buf_ptr + RX_BUF_OFFSET),
-                          (int)(p_rxdesc_curr->byte_cnt - RX_BUF_OFFSET));
+               net_process_received_packet(
+                       p_rxdesc_curr->buf_ptr + RX_BUF_OFFSET,
+                       (int)(p_rxdesc_curr->byte_cnt - RX_BUF_OFFSET));
        }
        /*
         * free these descriptors and point next in the ring