#define DRIVER_NAME "mxc_nand"
struct mxc_nand_host {
- struct mtd_info mtd;
struct nand_chip *nand;
struct mxc_nand_regs __iomem *regs;
udelay(1);
}
if (max_retries < 0) {
- MTDDEBUG(MTD_DEBUG_LEVEL0, "%s(%d): INT not set\n",
+ pr_debug("%s(%d): INT not set\n",
__func__, param);
}
}
*/
static void send_cmd(struct mxc_nand_host *host, uint16_t cmd)
{
- MTDDEBUG(MTD_DEBUG_LEVEL3, "send_cmd(host, 0x%x)\n", cmd);
+ pr_debug("send_cmd(host, 0x%x)\n", cmd);
writenfc(cmd, &host->regs->flash_cmd);
writenfc(NFC_CMD, &host->regs->operation);
*/
static void send_addr(struct mxc_nand_host *host, uint16_t addr)
{
- MTDDEBUG(MTD_DEBUG_LEVEL3, "send_addr(host, 0x%x)\n", addr);
+ pr_debug("send_addr(host, 0x%x)\n", addr);
writenfc(addr, &host->regs->flash_addr);
writenfc(NFC_ADDR, &host->regs->operation);
int spare_only)
{
if (spare_only)
- MTDDEBUG(MTD_DEBUG_LEVEL1, "send_prog_page (%d)\n", spare_only);
+ pr_debug("send_prog_page (%d)\n", spare_only);
if (is_mxc_nfc_21() || is_mxc_nfc_32()) {
int i;
static void send_read_page(struct mxc_nand_host *host, uint8_t buf_id,
int spare_only)
{
- MTDDEBUG(MTD_DEBUG_LEVEL3, "send_read_page (%d)\n", spare_only);
+ pr_debug("send_read_page (%d)\n", spare_only);
#if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
writenfc(buf_id, &host->regs->buf_addr);
uint8_t *bufpoi = buf;
int i, toread;
- MTDDEBUG(MTD_DEBUG_LEVEL0,
- "%s: Reading OOB area of page %u to oob %p\n",
+ pr_debug("%s: Reading OOB area of page %u to oob %p\n",
__func__, page, buf);
chip->cmdfunc(mtd, NAND_CMD_READOOB, mtd->writesize, page);
uint8_t *p = buf;
uint8_t *oob = chip->oob_poi;
- MTDDEBUG(MTD_DEBUG_LEVEL1, "Reading page %u to buf %p oob %p\n",
- page, buf, oob);
+ pr_debug("Reading page %u to buf %p oob %p\n",
+ page, buf, oob);
/* first read the data area and the available portion of OOB */
for (n = 0; eccsteps; n++, eccsteps--, p += eccsize) {
static int mxc_nand_write_page_raw_syndrome(struct mtd_info *mtd,
struct nand_chip *chip,
const uint8_t *buf,
- int oob_required)
+ int oob_required, int page)
{
struct mxc_nand_host *host = nand_get_controller_data(chip);
int eccsize = chip->ecc.size;
static int mxc_nand_write_page_syndrome(struct mtd_info *mtd,
struct nand_chip *chip,
const uint8_t *buf,
- int oob_required)
+ int oob_required, int page)
{
struct mxc_nand_host *host = nand_get_controller_data(chip);
int i, n, eccsize = chip->ecc.size;
mtd->writesize / nand_chip->subpagesize
- subpages);
}
- return -1;
+ return -EBADMSG;
}
ecc_status >>= 4;
subpages--;
uint16_t ecc_status = readnfc(&host->regs->ecc_status_result);
if (((ecc_status & 0x3) == 2) || ((ecc_status >> 2) == 2)) {
- MTDDEBUG(MTD_DEBUG_LEVEL0,
- "MXC_NAND: HWECC uncorrectable 2-bit ECC error\n");
- return -1;
+ pr_debug("MXC_NAND: HWECC uncorrectable 2-bit ECC error\n");
+ return -EBADMSG;
}
return 0;
uint16_t col, ret;
uint16_t __iomem *p;
- MTDDEBUG(MTD_DEBUG_LEVEL3,
- "mxc_nand_read_word(col = %d)\n", host->col_addr);
+ pr_debug("mxc_nand_read_word(col = %d)\n", host->col_addr);
col = host->col_addr;
/* Adjust saved column address */
struct mxc_nand_host *host = nand_get_controller_data(nand_chip);
int n, col, i = 0;
- MTDDEBUG(MTD_DEBUG_LEVEL3,
- "mxc_nand_write_buf(col = %d, len = %d)\n", host->col_addr,
- len);
+ pr_debug("mxc_nand_write_buf(col = %d, len = %d)\n", host->col_addr,
+ len);
col = host->col_addr;
n = mtd->writesize + mtd->oobsize - col;
n = min(len, n);
- MTDDEBUG(MTD_DEBUG_LEVEL3,
- "%s:%d: col = %d, n = %d\n", __func__, __LINE__, col, n);
+ pr_debug("%s:%d: col = %d, n = %d\n", __func__, __LINE__, col, n);
while (n > 0) {
void __iomem *p;
mtd->writesize + (col & ~3);
}
- MTDDEBUG(MTD_DEBUG_LEVEL3, "%s:%d: p = %p\n", __func__,
- __LINE__, p);
+ pr_debug("%s:%d: p = %p\n", __func__,
+ __LINE__, p);
if (((col | (unsigned long)&buf[i]) & 3) || n < 4) {
union {
m = min(n, m) & ~3;
- MTDDEBUG(MTD_DEBUG_LEVEL3,
- "%s:%d: n = %d, m = %d, i = %d, col = %d\n",
- __func__, __LINE__, n, m, i, col);
+ pr_debug("%s:%d: n = %d, m = %d, i = %d, col = %d\n",
+ __func__, __LINE__, n, m, i, col);
mxc_nand_memcpy32(p, (uint32_t *)&buf[i], m);
col += m;
struct mxc_nand_host *host = nand_get_controller_data(nand_chip);
int n, col, i = 0;
- MTDDEBUG(MTD_DEBUG_LEVEL3,
- "mxc_nand_read_buf(col = %d, len = %d)\n", host->col_addr, len);
+ pr_debug("mxc_nand_read_buf(col = %d, len = %d)\n", host->col_addr,
+ len);
col = host->col_addr;
struct nand_chip *nand_chip = mtd_to_nand(mtd);
struct mxc_nand_host *host = nand_get_controller_data(nand_chip);
- MTDDEBUG(MTD_DEBUG_LEVEL3,
- "mxc_nand_command (cmd = 0x%x, col = 0x%x, page = 0x%x)\n",
- command, column, page_addr);
+ pr_debug("mxc_nand_command (cmd = 0x%x, col = 0x%x, page = 0x%x)\n",
+ command, column, page_addr);
/* Reset command state information */
host->status_request = false;