fsl_upm_run_pattern(&fun->upm, fun->width, io_addr, mar);
/*
- * Some boards/chips needs this. At least the MPC8360E-RDK
- * needs it. Probably weird chip, because I don't see any
- * need for this on MPC8555E + Samsung K9F1G08U0A. Usually
- * here are 0-2 unexpected busy states per block read.
+ * Some boards/chips needs this. At least the MPC8360E-RDK
+ * needs it. Probably weird chip, because I don't see any
+ * need for this on MPC8555E + Samsung K9F1G08U0A. Usually
+ * here are 0-2 unexpected busy states per block read.
*/
if (fun->wait_flags & FSL_UPM_WAIT_RUN_PATTERN)
fun_wait(fun);
buf[i] = in_8(chip->IO_ADDR_R);
}
+#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
static int upm_nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)
{
int i;
return 0;
}
+#endif
static int nand_dev_ready(struct mtd_info *mtd)
{
chip->read_byte = upm_nand_read_byte;
chip->read_buf = upm_nand_read_buf;
chip->write_buf = upm_nand_write_buf;
+#if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
chip->verify_buf = upm_nand_verify_buf;
+#endif
if (fun->dev_ready)
chip->dev_ready = nand_dev_ready;