mtd: nand: Wait for PAGEPROG to finish in drivers setting NAND_ECC_CUSTOM_PAGE_ACCESS

[oweals/u-boot.git] / drivers / mtd / nand / davinci_nand.c

diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c
index be9d666b6824eb8bdeaae3168e0d68ca2ef7162b..65104c6cf483ed822ff832d59b3a60bdce5bc999 100644 (file)
--- a/drivers/mtd/nand/davinci_nand.c
+++ b/drivers/mtd/nand/davinci_nand.c
@@ -238,23 +238,22 @@ static int nand_davinci_correct_data(struct mtd_info *mtd, u_char *dat,
                                uint32_t find_byte = diff >> (12 + 3);
 
                                dat[find_byte] ^= find_bit;
-                               MTDDEBUG(MTD_DEBUG_LEVEL0, "Correcting single "
+                               pr_debug("Correcting single "
                                         "bit ECC error at offset: %d, bit: "
                                         "%d\n", find_byte, find_bit);
                                return 1;
                        } else {
-                               return -1;
+                               return -EBADMSG;
                        }
                } else if (!(diff & (diff - 1))) {
                        /* Single bit ECC error in the ECC itself,
                           nothing to fix */
-                       MTDDEBUG(MTD_DEBUG_LEVEL0, "Single bit ECC error in "
-                                "ECC.\n");
+                       pr_debug("Single bit ECC error in " "ECC.\n");
                        return 1;
                } else {
                        /* Uncorrectable error */
-                       MTDDEBUG(MTD_DEBUG_LEVEL0, "ECC UNCORRECTED_ERROR 1\n");
-                       return -1;
+                       pr_debug("ECC UNCORRECTED_ERROR 1\n");
+                       return -EBADMSG;
                }
        }
        return 0;
@@ -359,13 +358,12 @@ static struct nand_ecclayout nand_keystone_rbl_4bit_layout_oobfirst = {
  * @buf: the data to write
  * @oob_required: must write chip->oob_poi to OOB
  * @page: page number to write
- * @cached: cached programming
  * @raw: use _raw version of write_page
  */
 static int nand_davinci_write_page(struct mtd_info *mtd, struct nand_chip *chip,
                                   uint32_t offset, int data_len,
                                   const uint8_t *buf, int oob_required,
-                                  int page, int cached, int raw)
+                                  int page, int raw)
 {
        int status;
        int ret = 0;
@@ -396,13 +394,6 @@ static int nand_davinci_write_page(struct mtd_info *mtd, struct nand_chip *chip,
        chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
        status = chip->waitfunc(mtd, chip);
 
-       /*
-        * See if operation failed and additional status checks are
-        * available.
-        */
-       if ((status & NAND_STATUS_FAIL) && (chip->errstat))
-               status = chip->errstat(mtd, chip, FL_WRITING, status, page);
-
        if (status & NAND_STATUS_FAIL) {
                ret = -EIO;
                goto err;
@@ -701,7 +692,7 @@ static int nand_davinci_4bit_correct_data(struct mtd_info *mtd, uint8_t *dat,
                return 0;
        } else if (iserror == ECC_STATE_TOO_MANY_ERRS) {
                val = __raw_readl(&davinci_emif_regs->nanderrval1);
-               return -1;
+               return -EBADMSG;
        }
 
        numerrors = ((__raw_readl(&davinci_emif_regs->nandfsr) >> 16)
@@ -799,6 +790,9 @@ void davinci_nand_init(struct nand_chip *nand)
 #ifdef CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
        nand->options     |= NAND_NO_SUBPAGE_WRITE;
 #endif
+#ifdef CONFIG_SYS_NAND_BUSWIDTH_16BIT
+       nand->options     |= NAND_BUSWIDTH_16;
+#endif
 #ifdef CONFIG_SYS_NAND_HW_ECC
        nand->ecc.mode = NAND_ECC_HW;
        nand->ecc.size = 512;