#endif
#include <dm.h>
#include <power/regulator.h>
+#include <thermal.h>
DECLARE_GLOBAL_DATA_PTR;
#if CONFIG_IS_ENABLED(DM_MMC)
struct gpio_desc cd_gpio; /* Change Detect GPIO */
struct gpio_desc wp_gpio; /* Write Protect GPIO */
- bool cd_inverted;
#else
int cd_gpio;
int wp_gpio;
enum bus_mode mode;
#endif
u8 controller_flags;
-#ifndef CONFIG_OMAP34XX
+#ifdef CONFIG_MMC_OMAP_HS_ADMA
struct omap_hsmmc_adma_desc *adma_desc_table;
uint desc_slot;
#endif
u8 controller_flags;
};
-#ifndef CONFIG_OMAP34XX
+#ifdef CONFIG_MMC_OMAP_HS_ADMA
struct omap_hsmmc_adma_desc {
u8 attr;
u8 reserved;
/* for cairo board, we need to set up 1.8 Volt bias level on MMC1 */
pbias_lite &= ~PBIASLITEVMODE0;
#endif
+#ifdef CONFIG_TARGET_OMAP3_LOGIC
+ /* For Logic PD board, 1.8V bias to go enable gpio127 for mmc_cd */
+ pbias_lite &= ~PBIASLITEVMODE1;
+#endif
#ifdef CONFIG_MMC_OMAP36XX_PINS
if (get_cpu_family() == CPU_OMAP36XX) {
/* Disable extended drain IO before changing PBIAS */
!CONFIG_IS_ENABLED(DM_REGULATOR)
/* PBIAS config needed for MMC1 only */
if (mmc_get_blk_desc(mmc)->devnum == 0)
- vmmc_pbias_config(LDO_VOLT_3V0);
+ vmmc_pbias_config(LDO_VOLT_3V3);
#endif
return 0;
switch (signal_voltage) {
case MMC_SIGNAL_VOLTAGE_330:
- hctl |= SDVS_3V0;
+ hctl |= SDVS_3V3;
break;
case MMC_SIGNAL_VOLTAGE_180:
hctl |= SDVS_1V8;
writel(ac12, &mmc_base->ac12);
}
-#if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
-static int omap_hsmmc_wait_dat0(struct udevice *dev, int state, int timeout)
+static int omap_hsmmc_wait_dat0(struct udevice *dev, int state, int timeout_us)
{
int ret = -ETIMEDOUT;
u32 con;
con = readl(&mmc_base->con);
writel(con | CON_CLKEXTFREE | CON_PADEN, &mmc_base->con);
- timeout = DIV_ROUND_UP(timeout, 10); /* check every 10 us. */
- while (timeout--) {
+ timeout_us = DIV_ROUND_UP(timeout_us, 10); /* check every 10 us. */
+ while (timeout_us--) {
dat0_high = !!(readl(&mmc_base->pstate) & PSTATE_DLEV_DAT0);
if (dat0_high == target_dat0_high) {
ret = 0;
return ret;
}
-#endif
#if CONFIG_IS_ENABLED(MMC_IO_VOLTAGE)
#if CONFIG_IS_ENABLED(DM_REGULATOR)
return 0;
/* Disable PBIAS */
- ret = regulator_set_enable(priv->pbias_supply, false);
- if (ret && ret != -ENOSYS)
+ ret = regulator_set_enable_if_allowed(priv->pbias_supply, false);
+ if (ret)
return ret;
/* Turn off IO voltage */
- ret = regulator_set_enable(mmc->vqmmc_supply, false);
- if (ret && ret != -ENOSYS)
+ ret = regulator_set_enable_if_allowed(mmc->vqmmc_supply, false);
+ if (ret)
return ret;
/* Program a new IO voltage value */
ret = regulator_set_value(mmc->vqmmc_supply, uV);
if (ret)
return ret;
/* Turn on IO voltage */
- ret = regulator_set_enable(mmc->vqmmc_supply, true);
- if (ret && ret != -ENOSYS)
+ ret = regulator_set_enable_if_allowed(mmc->vqmmc_supply, true);
+ if (ret)
return ret;
/* Program PBIAS voltage*/
if (ret && ret != -ENOSYS)
return ret;
/* Enable PBIAS */
- ret = regulator_set_enable(priv->pbias_supply, true);
- if (ret && ret != -ENOSYS)
+ ret = regulator_set_enable_if_allowed(priv->pbias_supply, true);
+ if (ret)
return ret;
return 0;
return -EINVAL;
if (mmc->signal_voltage == MMC_SIGNAL_VOLTAGE_330) {
- /* Use 3.0V rather than 3.3V */
- mv = 3000;
- capa_mask = VS30_3V0SUP;
- palmas_ldo_volt = LDO_VOLT_3V0;
+ mv = 3300;
+ capa_mask = VS33_3V3SUP;
+ palmas_ldo_volt = LDO_VOLT_3V3;
} else if (mmc->signal_voltage == MMC_SIGNAL_VOLTAGE_180) {
capa_mask = VS18_1V8SUP;
palmas_ldo_volt = LDO_VOLT_1V8;
val = readl(&mmc_base->capa);
if (priv->controller_flags & OMAP_HSMMC_SUPPORTS_DUAL_VOLT) {
- val |= (VS30_3V0SUP | VS18_1V8SUP);
+ val |= (VS33_3V3SUP | VS18_1V8SUP);
} else if (priv->controller_flags & OMAP_HSMMC_NO_1_8_V) {
- val |= VS30_3V0SUP;
+ val |= VS33_3V3SUP;
val &= ~VS18_1V8SUP;
} else {
val |= VS18_1V8SUP;
- val &= ~VS30_3V0SUP;
+ val &= ~VS33_3V3SUP;
}
writel(val, &mmc_base->capa);
u32 phase_delay = 0;
u32 start_window = 0, max_window = 0;
u32 length = 0, max_len = 0;
+ bool single_point_failure = false;
+ struct udevice *thermal_dev;
+ int temperature;
+ int i;
mmc_base = priv->base_addr;
val = readl(&mmc_base->capa2);
((mmc->selected_mode == UHS_SDR50) && (val & CAPA2_TSDR50))))
return 0;
+ ret = uclass_first_device(UCLASS_THERMAL, &thermal_dev);
+ if (ret) {
+ printf("Couldn't get thermal device for tuning\n");
+ return ret;
+ }
+ ret = thermal_get_temp(thermal_dev, &temperature);
+ if (ret) {
+ printf("Couldn't get temperature for tuning\n");
+ return ret;
+ }
val = readl(&mmc_base->dll);
val |= DLL_SWT;
writel(val, &mmc_base->dll);
+
+ /*
+ * Stage 1: Search for a maximum pass window ignoring any
+ * any single point failures. If the tuning value ends up
+ * near it, move away from it in stage 2 below
+ */
while (phase_delay <= MAX_PHASE_DELAY) {
omap_hsmmc_set_dll(mmc, phase_delay);
if (cur_match) {
if (prev_match) {
length++;
+ } else if (single_point_failure) {
+ /* ignore single point failure */
+ length++;
+ single_point_failure = false;
} else {
start_window = phase_delay;
length = 1;
}
+ } else {
+ single_point_failure = prev_match;
}
if (length > max_len) {
ret = -EIO;
goto tuning_error;
}
+ /*
+ * Assign tuning value as a ratio of maximum pass window based
+ * on temperature
+ */
+ if (temperature < -20000)
+ phase_delay = min(max_window + 4 * max_len - 24,
+ max_window +
+ DIV_ROUND_UP(13 * max_len, 16) * 4);
+ else if (temperature < 20000)
+ phase_delay = max_window + DIV_ROUND_UP(9 * max_len, 16) * 4;
+ else if (temperature < 40000)
+ phase_delay = max_window + DIV_ROUND_UP(8 * max_len, 16) * 4;
+ else if (temperature < 70000)
+ phase_delay = max_window + DIV_ROUND_UP(7 * max_len, 16) * 4;
+ else if (temperature < 90000)
+ phase_delay = max_window + DIV_ROUND_UP(5 * max_len, 16) * 4;
+ else if (temperature < 120000)
+ phase_delay = max_window + DIV_ROUND_UP(4 * max_len, 16) * 4;
+ else
+ phase_delay = max_window + DIV_ROUND_UP(3 * max_len, 16) * 4;
+
+ /*
+ * Stage 2: Search for a single point failure near the chosen tuning
+ * value in two steps. First in the +3 to +10 range and then in the
+ * +2 to -10 range. If found, move away from it in the appropriate
+ * direction by the appropriate amount depending on the temperature.
+ */
+ for (i = 3; i <= 10; i++) {
+ omap_hsmmc_set_dll(mmc, phase_delay + i);
+ if (mmc_send_tuning(mmc, opcode, NULL)) {
+ if (temperature < 10000)
+ phase_delay += i + 6;
+ else if (temperature < 20000)
+ phase_delay += i - 12;
+ else if (temperature < 70000)
+ phase_delay += i - 8;
+ else if (temperature < 90000)
+ phase_delay += i - 6;
+ else
+ phase_delay += i - 6;
+
+ goto single_failure_found;
+ }
+ }
+
+ for (i = 2; i >= -10; i--) {
+ omap_hsmmc_set_dll(mmc, phase_delay + i);
+ if (mmc_send_tuning(mmc, opcode, NULL)) {
+ if (temperature < 10000)
+ phase_delay += i + 12;
+ else if (temperature < 20000)
+ phase_delay += i + 8;
+ else if (temperature < 70000)
+ phase_delay += i + 8;
+ else if (temperature < 90000)
+ phase_delay += i + 10;
+ else
+ phase_delay += i + 12;
+
+ goto single_failure_found;
+ }
+ }
+
+single_failure_found:
- phase_delay = max_window + 4 * ((3 * max_len) >> 2);
omap_hsmmc_set_dll(mmc, phase_delay);
mmc_reset_controller_fsm(mmc_base, SYSCTL_SRD);
return ret;
}
#endif
-
-static void omap_hsmmc_send_init_stream(struct udevice *dev)
-{
- struct omap_hsmmc_data *priv = dev_get_priv(dev);
- struct hsmmc *mmc_base = priv->base_addr;
-
- mmc_init_stream(mmc_base);
-}
#endif
static void mmc_enable_irq(struct mmc *mmc, struct mmc_cmd *cmd)
return -ETIMEDOUT;
}
}
-#ifndef CONFIG_OMAP34XX
+#ifdef CONFIG_MMC_OMAP_HS_ADMA
reg_val = readl(&mmc_base->hl_hwinfo);
if (reg_val & MADMA_EN)
priv->controller_flags |= OMAP_HSMMC_USE_ADMA;
#if CONFIG_IS_ENABLED(DM_MMC)
reg_val = omap_hsmmc_set_capabilities(mmc);
- omap_hsmmc_conf_bus_power(mmc, (reg_val & VS30_3V0SUP) ?
+ omap_hsmmc_conf_bus_power(mmc, (reg_val & VS33_3V3SUP) ?
MMC_SIGNAL_VOLTAGE_330 : MMC_SIGNAL_VOLTAGE_180);
#else
writel(DTW_1_BITMODE | SDBP_PWROFF | SDVS_3V0, &mmc_base->hctl);
- writel(readl(&mmc_base->capa) | VS30_3V0SUP | VS18_1V8SUP,
+ writel(readl(&mmc_base->capa) | VS33_3V3SUP | VS18_1V8SUP,
&mmc_base->capa);
#endif
}
}
-#ifndef CONFIG_OMAP34XX
+#ifdef CONFIG_MMC_OMAP_HS_ADMA
static void omap_hsmmc_adma_desc(struct mmc *mmc, char *buf, u16 len, bool end)
{
struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc);
if (get_timer(0) - start > MAX_RETRY_MS) {
printf("%s: timedout waiting on cmd inhibit to clear\n",
__func__);
+ mmc_reset_controller_fsm(mmc_base, SYSCTL_SRD);
+ mmc_reset_controller_fsm(mmc_base, SYSCTL_SRC);
return -ETIMEDOUT;
}
}
writel(0xFFFFFFFF, &mmc_base->stat);
- start = get_timer(0);
- while (readl(&mmc_base->stat)) {
- if (get_timer(0) - start > MAX_RETRY_MS) {
- printf("%s: timedout waiting for STAT (%x) to clear\n",
- __func__, readl(&mmc_base->stat));
- return -ETIMEDOUT;
- }
+ if (readl(&mmc_base->stat)) {
+ mmc_reset_controller_fsm(mmc_base, SYSCTL_SRD);
+ mmc_reset_controller_fsm(mmc_base, SYSCTL_SRC);
}
+
/*
* CMDREG
* CMDIDX[13:8] : Command index
else
flags |= (DP_DATA | DDIR_WRITE);
-#ifndef CONFIG_OMAP34XX
+#ifdef CONFIG_MMC_OMAP_HS_ADMA
if ((priv->controller_flags & OMAP_HSMMC_USE_ADMA) &&
!mmc_is_tuning_cmd(cmd->cmdidx)) {
omap_hsmmc_prepare_data(mmc, data);
}
}
-#ifndef CONFIG_OMAP34XX
+#ifdef CONFIG_MMC_OMAP_HS_ADMA
if ((priv->controller_flags & OMAP_HSMMC_USE_ADMA) && data &&
!mmc_is_tuning_cmd(cmd->cmdidx)) {
u32 sz_mb, timeout;
return 0;
}
+#if CONFIG_IS_ENABLED(MMC_WRITE)
static int mmc_write_data(struct hsmmc *mmc_base, const char *buf,
- unsigned int size)
+ unsigned int size)
{
unsigned int *input_buf = (unsigned int *)buf;
unsigned int mmc_stat;
}
return 0;
}
-
+#else
+static int mmc_write_data(struct hsmmc *mmc_base, const char *buf,
+ unsigned int size)
+{
+ return -ENOTSUPP;
+}
+#endif
static void omap_hsmmc_stop_clock(struct hsmmc *mmc_base)
{
writel(readl(&mmc_base->sysctl) & ~CEN_ENABLE, &mmc_base->sysctl);
#if CONFIG_IS_ENABLED(DM_MMC)
static int omap_hsmmc_getcd(struct udevice *dev)
{
+ int value = -1;
+#if CONFIG_IS_ENABLED(DM_GPIO)
struct omap_hsmmc_data *priv = dev_get_priv(dev);
- int value;
-
value = dm_gpio_get_value(&priv->cd_gpio);
+#endif
/* if no CD return as 1 */
if (value < 0)
return 1;
- if (priv->cd_inverted)
- return !value;
return value;
}
static int omap_hsmmc_getwp(struct udevice *dev)
{
+ int value = 0;
+#if CONFIG_IS_ENABLED(DM_GPIO)
struct omap_hsmmc_data *priv = dev_get_priv(dev);
- int value;
-
value = dm_gpio_get_value(&priv->wp_gpio);
+#endif
/* if no WP return as 0 */
if (value < 0)
return 0;
#ifdef MMC_SUPPORTS_TUNING
.execute_tuning = omap_hsmmc_execute_tuning,
#endif
- .send_init_stream = omap_hsmmc_send_init_stream,
-#if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
.wait_dat0 = omap_hsmmc_wait_dat0,
-#endif
};
#else
static const struct mmc_ops omap_hsmmc_ops = {
struct mmc_config *cfg;
uint host_caps_val;
- priv = malloc(sizeof(*priv));
+ priv = calloc(1, sizeof(*priv));
if (priv == NULL)
return -1;
if (ret < 0)
return ret;
+ if (!cfg->f_max)
+ cfg->f_max = 52000000;
cfg->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
cfg->f_min = 400000;
cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
}
#endif
-#ifdef OMAP_HSMMC_USE_GPIO
- plat->cd_inverted = fdtdec_get_bool(fdt, node, "cd-inverted");
-#endif
-
return 0;
}
#endif
static int omap_hsmmc_bind(struct udevice *dev)
{
struct omap_hsmmc_plat *plat = dev_get_platdata(dev);
-
- return mmc_bind(dev, &plat->mmc, &plat->cfg);
+ plat->mmc = calloc(1, sizeof(struct mmc));
+ return mmc_bind(dev, plat->mmc, &plat->cfg);
}
#endif
static int omap_hsmmc_probe(struct udevice *dev)
priv->base_addr = plat->base_addr;
priv->controller_flags = plat->controller_flags;
priv->hw_rev = plat->hw_rev;
-#ifdef OMAP_HSMMC_USE_GPIO
- priv->cd_inverted = plat->cd_inverted;
-#endif
#ifdef CONFIG_BLK
- mmc = &plat->mmc;
+ mmc = plat->mmc;
#else
mmc = mmc_create(cfg, priv);
if (mmc == NULL)
device_get_supply_regulator(dev, "pbias-supply",
&priv->pbias_supply);
#endif
-#if defined(OMAP_HSMMC_USE_GPIO) && CONFIG_IS_ENABLED(OF_CONTROL)
+#if defined(OMAP_HSMMC_USE_GPIO)
+#if CONFIG_IS_ENABLED(OF_CONTROL) && CONFIG_IS_ENABLED(DM_GPIO)
gpio_request_by_name(dev, "cd-gpios", 0, &priv->cd_gpio, GPIOD_IS_IN);
gpio_request_by_name(dev, "wp-gpios", 0, &priv->wp_gpio, GPIOD_IS_IN);
+#endif
#endif
mmc->dev = dev;
.ops = &omap_hsmmc_ops,
.probe = omap_hsmmc_probe,
.priv_auto_alloc_size = sizeof(struct omap_hsmmc_data),
+#if !CONFIG_IS_ENABLED(OF_CONTROL)
.flags = DM_FLAG_PRE_RELOC,
+#endif
};
#endif
projects / oweals / u-boot.git / blobdiff