mmc: Merge SD_LEGACY and MMC_LEGACY bus modes

[oweals/u-boot.git] / drivers / mmc / fsl_esdhc_imx.c

diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c
index 96fe01e26d2c2dcebb0faa3f6ee5f6bd36cc2a7c..6bca2a9c829ed26311bb17eba6ea6fa88e243a8e 100644 (file)
--- a/drivers/mmc/fsl_esdhc_imx.c
+++ b/drivers/mmc/fsl_esdhc_imx.c
@@ -19,6 +19,8 @@
 #include <hwconfig.h>
 #include <mmc.h>
 #include <part.h>
+#include <dm/device_compat.h>
+#include <linux/err.h>
 #include <power/regulator.h>
 #include <malloc.h>
 #include <fsl_esdhc_imx.h>
@@ -661,35 +663,6 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock)
        priv->clock = clock;
 }
 
-#ifdef CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK
-static void esdhc_clock_control(struct fsl_esdhc_priv *priv, bool enable)
-{
-       struct fsl_esdhc *regs = priv->esdhc_regs;
-       u32 value;
-       u32 time_out;
-
-       value = esdhc_read32(&regs->sysctl);
-
-       if (enable)
-               value |= SYSCTL_CKEN;
-       else
-               value &= ~SYSCTL_CKEN;
-
-       esdhc_write32(&regs->sysctl, value);
-
-       time_out = 20;
-       value = PRSSTAT_SDSTB;
-       while (!(esdhc_read32(&regs->prsstat) & value)) {
-               if (time_out == 0) {
-                       printf("fsl_esdhc: Internal clock never stabilised.\n");
-                       break;
-               }
-               time_out--;
-               mdelay(1);
-       }
-}
-#endif
-
 #ifdef MMC_SUPPORTS_TUNING
 static int esdhc_change_pinstate(struct udevice *dev)
 {
@@ -770,7 +743,6 @@ static int esdhc_set_timing(struct mmc *mmc)
 
        switch (mmc->selected_mode) {
        case MMC_LEGACY:
-       case SD_LEGACY:
                esdhc_reset_tuning(mmc);
                writel(mixctrl, &regs->mixctrl);
                break;
@@ -961,12 +933,6 @@ static int esdhc_set_ios_common(struct fsl_esdhc_priv *priv, struct mmc *mmc)
        int ret __maybe_unused;
        u32 clock;
 
-#ifdef CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK
-       /* Select to use peripheral clock */
-       esdhc_clock_control(priv, false);
-       esdhc_setbits32(&regs->scr, ESDHCCTL_PCS);
-       esdhc_clock_control(priv, true);
-#endif
        /* Set the clock speed */
        clock = mmc->clock;
        if (clock < mmc->cfg->f_min)
@@ -1394,13 +1360,8 @@ void fdt_fixup_esdhc(void *blob, bd_t *bd)
        if (esdhc_status_fixup(blob, compat))
                return;
 
-#ifdef CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK
-       do_fixup_by_compat_u32(blob, compat, "peripheral-frequency",
-                              gd->arch.sdhc_clk, 1);
-#else
        do_fixup_by_compat_u32(blob, compat, "clock-frequency",
                               gd->arch.sdhc_clk, 1);
-#endif
 }
 #endif