Merge git://git.denx.de/u-boot-mpc85xx
[oweals/u-boot.git] / drivers / mmc / fsl_esdhc.c
index b9bc1654d38d01cd877a0be54116d0cb003ea7a5..c4719e6f3635b6396ea731c8c624199d17cdc335 100644 (file)
@@ -506,11 +506,47 @@ static void set_sysctl(struct mmc *mmc, uint clock)
        esdhc_setbits32(&regs->sysctl, clk);
 }
 
+#ifdef CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK
+static void esdhc_clock_control(struct mmc *mmc, bool enable)
+{
+       struct fsl_esdhc_cfg *cfg = mmc->priv;
+       struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg->esdhc_base;
+       u32 value;
+       u32 time_out;
+
+       value = esdhc_read32(&regs->sysctl);
+
+       if (enable)
+               value |= SYSCTL_CKEN;
+       else
+               value &= ~SYSCTL_CKEN;
+
+       esdhc_write32(&regs->sysctl, value);
+
+       time_out = 20;
+       value = PRSSTAT_SDSTB;
+       while (!(esdhc_read32(&regs->prsstat) & value)) {
+               if (time_out == 0) {
+                       printf("fsl_esdhc: Internal clock never stabilised.\n");
+                       break;
+               }
+               time_out--;
+               mdelay(1);
+       }
+}
+#endif
+
 static void esdhc_set_ios(struct mmc *mmc)
 {
        struct fsl_esdhc_cfg *cfg = mmc->priv;
        struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg->esdhc_base;
 
+#ifdef CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK
+       /* Select to use peripheral clock */
+       esdhc_clock_control(mmc, false);
+       esdhc_setbits32(&regs->scr, ESDHCCTL_PCS);
+       esdhc_clock_control(mmc, true);
+#endif
        /* Set the clock speed */
        set_sysctl(mmc, mmc->clock);
 
@@ -694,6 +730,39 @@ int fsl_esdhc_mmc_init(bd_t *bis)
        return fsl_esdhc_initialize(bis, cfg);
 }
 
+#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
+void mmc_adapter_card_type_ident(void)
+{
+       u8 card_id;
+       u8 value;
+
+       card_id = QIXIS_READ(present) & QIXIS_SDID_MASK;
+       gd->arch.sdhc_adapter = card_id;
+
+       switch (card_id) {
+       case QIXIS_ESDHC_ADAPTER_TYPE_EMMC45:
+               break;
+       case QIXIS_ESDHC_ADAPTER_TYPE_SDMMC_LEGACY:
+               break;
+       case QIXIS_ESDHC_ADAPTER_TYPE_EMMC44:
+               value = QIXIS_READ(brdcfg[5]);
+               value |= (QIXIS_SDCLKIN | QIXIS_SDCLKOUT);
+               QIXIS_WRITE(brdcfg[5], value);
+               break;
+       case QIXIS_ESDHC_ADAPTER_TYPE_RSV:
+               break;
+       case QIXIS_ESDHC_ADAPTER_TYPE_MMC:
+               break;
+       case QIXIS_ESDHC_ADAPTER_TYPE_SD:
+               break;
+       case QIXIS_ESDHC_NO_ADAPTER:
+               break;
+       default:
+               break;
+       }
+}
+#endif
+
 #ifdef CONFIG_OF_LIBFDT
 void fdt_fixup_esdhc(void *blob, bd_t *bd)
 {
@@ -707,9 +776,17 @@ void fdt_fixup_esdhc(void *blob, bd_t *bd)
        }
 #endif
 
+#ifdef CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK
+       do_fixup_by_compat_u32(blob, compat, "peripheral-frequency",
+                              gd->arch.sdhc_clk, 1);
+#else
        do_fixup_by_compat_u32(blob, compat, "clock-frequency",
                               gd->arch.sdhc_clk, 1);
-
+#endif
+#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
+       do_fixup_by_compat_u32(blob, compat, "adapter-type",
+                              (u32)(gd->arch.sdhc_adapter), 1);
+#endif
        do_fixup_by_compat(blob, compat, "status", "okay",
                           4 + 1, 1);
 }