Merge branch 'master' of git://git.denx.de/u-boot-video

[oweals/u-boot.git] / drivers / mmc / fsl_esdhc.c

diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index c690a9722d34425857c36c6d2b0289d62d0c6662..0b370026592eac36cf127b2ce6eb7c9df7b4cd2c 100644 (file)
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -274,7 +274,6 @@ static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data)
        return 0;
 }
 
-#ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO
 static void check_and_invalidate_dcache_range
        (struct mmc_cmd *cmd,
         struct mmc_data *data) {
@@ -297,7 +296,6 @@ static void check_and_invalidate_dcache_range
 #endif
        invalidate_dcache_range(start, end);
 }
-#endif
 
 /*
  * Sends a command out on the bus.  Takes the mmc pointer,
@@ -341,6 +339,9 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
                err = esdhc_setup_data(mmc, data);
                if(err)
                        return err;
+
+               if (data->flags & MMC_DATA_READ)
+                       check_and_invalidate_dcache_range(cmd, data);
        }
 
        /* Figure out the transfer arguments */
@@ -387,9 +388,9 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
 
        /* Workaround for ESDHC errata ENGcm03648 */
        if (!data && (cmd->resp_type & MMC_RSP_BUSY)) {
-               int timeout = 2500;
+               int timeout = 6000;
 
-               /* Poll on DATA0 line for cmd with busy signal for 250 ms */
+               /* Poll on DATA0 line for cmd with busy signal for 600 ms */
                while (timeout > 0 && !(esdhc_read32(&regs->prsstat) &
                                        PRSSTAT_DAT0)) {
                        udelay(100);
@@ -437,6 +438,11 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
                        }
                } while ((irqstat & DATA_COMPLETE) != DATA_COMPLETE);
 
+               /*
+                * Need invalidate the dcache here again to avoid any
+                * cache-fill during the DMA operations such as the
+                * speculative pre-fetching etc.
+                */
                if (data->flags & MMC_DATA_READ)
                        check_and_invalidate_dcache_range(cmd, data);
 #endif
@@ -688,7 +694,7 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)
                return -1;
        }
 
-       cfg->cfg.host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT | MMC_MODE_HC;
+       cfg->cfg.host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT;
 #ifdef CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE
        cfg->cfg.host_caps |= MMC_MODE_DDR_52MHz;
 #endif