* (Which is just as well - otherwise we'd have to nobble the DMA engine
* too)
*/
- while (get_timer_us(bcm_host->last_write) < bcm_host->twoticks_delay)
+ while (timer_get_us() - bcm_host->last_write < bcm_host->twoticks_delay)
;
writel(val, host->ioaddr + reg);
- bcm_host->last_write = get_timer_us(0);
+ bcm_host->last_write = timer_get_us();
}
static inline u32 bcm2835_sdhci_raw_readl(struct sdhci_host *host, int reg)
struct bcm2835_sdhci_host *bcm_host;
struct sdhci_host *host;
- bcm_host = malloc(sizeof(*bcm_host));
+ bcm_host = calloc(1, sizeof(*bcm_host));
if (!bcm_host) {
- printf("sdhci_host malloc fail!\n");
+ printf("sdhci_host calloc fail!\n");
return 1;
}
host = &bcm_host->host;
host->name = "bcm2835_sdhci";
- host->ioaddr = (void *)regbase;
+ host->ioaddr = (void *)(unsigned long)regbase;
host->quirks = SDHCI_QUIRK_BROKEN_VOLTAGE | SDHCI_QUIRK_BROKEN_R1B |
SDHCI_QUIRK_WAIT_SEND_CMD | SDHCI_QUIRK_NO_HISPD_BIT;
host->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;