arm64: zynqmp: Point zcu216 defconfig to correct dts file

[oweals/u-boot.git] / drivers / mmc / Kconfig

diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 4cdae41b59a6956e990d8e2259da03a0db6c04c4..85fd1906bdf710351d14a7c3beb62be034f68b72 100644 (file)
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -156,6 +156,7 @@ config MMC_HS400_SUPPORT
 
 config SPL_MMC_HS400_SUPPORT
        bool "enable HS400 support in SPL"
+       select SPL_MMC_HS200_SUPPORT
        help
          The HS400 mode is support by some eMMC. The bus frequency is up to
          200MHz. This mode requires tuning the IO.
@@ -166,7 +167,6 @@ config MMC_HS200_SUPPORT
          The HS200 mode is support by some eMMC. The bus frequency is up to
          200MHz. This mode requires tuning the IO.
 
-
 config SPL_MMC_HS200_SUPPORT
        bool "enable HS200 support in SPL"
        help
@@ -420,6 +420,17 @@ config SPL_MMC_SDHCI_ADMA
          This enables support for the ADMA (Advanced DMA) defined
          in the SD Host Controller Standard Specification Version 3.00 in SPL.
 
+config MMC_SDHCI_ASPEED
+       bool "Aspeed SDHCI controller"
+       depends on ARCH_ASPEED
+       depends on DM_MMC
+       depends on MMC_SDHCI
+       help
+         Enables support for the Aspeed SDHCI 2.0 controller present on Aspeed
+         SoCs. This device is compatible with SD 3.0 and/or MMC 4.3
+         specifications. On the AST2600, the device is also compatible with
+         MMC 5.1 and eMMC 3.0.
+
 config MMC_SDHCI_ATMEL
        bool "Atmel SDHCI controller support"
        depends on ARCH_AT91
@@ -478,6 +489,17 @@ config MMC_SDHCI_AM654
          Support for Secure Digital Host Controller Interface (SDHCI)
          controllers present on TI's AM654 SOCs.
 
+config MMC_SDHCI_IPROC
+       bool "SDHCI support for the iProc SD/MMC Controller"
+       depends on MMC_SDHCI
+       help
+         This selects the iProc SD/MMC controller.
+
+         If you have a Broadcom IPROC platform with SD or MMC devices,
+         say Y or M here.
+
+         If unsure, say N.
+
 config MMC_SDHCI_KONA
        bool "SDHCI support on Broadcom KONA platform"
        depends on MMC_SDHCI
@@ -591,6 +613,17 @@ config MMC_SDHCI_TEGRA
 
          If unsure, say N.
 
+config TEGRA124_MMC_DISABLE_EXT_LOOPBACK
+       bool "Disable external clock loopback"
+       depends on MMC_SDHCI_TEGRA && TEGRA124
+       help
+         Disable the external clock loopback and use the internal one on SDMMC3
+         as per the SDMMC_VENDOR_MISC_CNTRL_0 register's SDMMC_SPARE1 bits
+         being set to 0xfffd according to the TRM.
+
+         TODO(marcel.ziswiler@toradex.com): Move to device tree controlled
+         approach once proper kernel integration made it mainline.
+
 config MMC_SDHCI_ZYNQ
        bool "Arasan SDHCI controller support"
        depends on ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_VERSAL
@@ -612,6 +645,12 @@ config ZYNQ_SDHCI_MIN_FREQ
        help
          Set the minimum frequency of the controller.
 
+config ZYNQ_HISPD_BROKEN
+       bool "High speed broken for Zynq SDHCI controller"
+       depends on MMC_SDHCI_ZYNQ
+       help
+         Set if high speed mode is broken.
+
 config MMC_SUNXI
        bool "Allwinner sunxi SD/MMC Host Controller support"
        depends on ARCH_SUNXI && !UART0_PORT_F
@@ -659,7 +698,7 @@ config FTSDC010_SDIO
 
 config MMC_MTK
        bool "MediaTek SD/MMC Card Interface support"
-       depends on ARCH_MEDIATEK
+       depends on ARCH_MEDIATEK || ARCH_MTMIPS
        depends on BLK && DM_MMC
        depends on OF_CONTROL
        help
@@ -670,29 +709,34 @@ config MMC_MTK
 
 endif
 
-config TEGRA124_MMC_DISABLE_EXT_LOOPBACK
-       bool "Disable external clock loopback"
-       depends on MMC_SDHCI_TEGRA && TEGRA124
-       help
-         Disable the external clock loopback and use the internal one on SDMMC3
-         as per the SDMMC_VENDOR_MISC_CNTRL_0 register's SDMMC_SPARE1 bits
-         being set to 0xfffd according to the TRM.
-
-         TODO(marcel.ziswiler@toradex.com): Move to device tree controlled
-         approach once proper kernel integration made it mainline.
-
 config FSL_ESDHC
        bool "Freescale/NXP eSDHC controller support"
+       select FSL_ESDHC_USE_PERIPHERAL_CLK if MMC_HS200_SUPPORT || MMC_UHS_SUPPORT
        help
          This selects support for the eSDHC (Enhanced Secure Digital Host
          Controller) found on numerous Freescale/NXP SoCs.
 
+config FSL_ESDHC_USE_PERIPHERAL_CLK
+       bool "enable ESDHC peripheral clock support"
+       depends on FSL_ESDHC
+       help
+         eSDHC supports two reference clocks (platform clock and peripheral clock).
+         Peripheral clock which could provide higher clock frequency is required to
+         be used for tuning of SD UHS mode and eMMC HS200/HS400 modes.
+
 config FSL_ESDHC_IMX
        bool "Freescale/NXP i.MX eSDHC controller support"
        help
          This selects support for the i.MX eSDHC (Enhanced Secure Digital Host
          Controller) found on numerous Freescale/NXP SoCs.
 
+config FSL_USDHC
+       bool "Freescale/NXP i.MX uSDHC controller support"
+       depends on MX6 || MX7 ||ARCH_MX7ULP || IMX8 || IMX8M || TARGET_S32V234EVB
+       select FSL_ESDHC_IMX
+       help
+         This enables the Ultra Secured Digital Host Controller enhancements
+
 endmenu
 
 config SYS_FSL_ERRATUM_ESDHC111