x86: Update SPL for coreboot
[oweals/u-boot.git] / drivers / misc / stm32_rcc.c
index 13d70696f64357ac00a2dcbcc2cd12c68a0106f3..980b84453e1973efed2cea8778f2528fc81d26f4 100644 (file)
@@ -9,6 +9,7 @@
 #include <misc.h>
 #include <stm32_rcc.h>
 #include <dm/device-internal.h>
+#include <dm/device_compat.h>
 #include <dm/lists.h>
 
 struct stm32_rcc_clk stm32_rcc_clk_f42x = {
@@ -68,8 +69,6 @@ static int stm32_rcc_bind(struct udevice *dev)
                                            dev_ofnode(dev), &child);
 }
 
-static const struct misc_ops stm32_rcc_ops = {
-};
 
 static const struct udevice_id stm32_rcc_ids[] = {
        {.compatible = "st,stm32f42xx-rcc", .data = (ulong)&stm32_rcc_clk_f42x },
@@ -82,8 +81,7 @@ static const struct udevice_id stm32_rcc_ids[] = {
 
 U_BOOT_DRIVER(stm32_rcc) = {
        .name           = "stm32-rcc",
-       .id             = UCLASS_MISC,
+       .id             = UCLASS_NOP,
        .of_match       = stm32_rcc_ids,
        .bind           = stm32_rcc_bind,
-       .ops            = &stm32_rcc_ops,
 };