Select this to enable a sysid for Altera devices. Please find
details on the "Embedded Peripherals IP User Guide" of Altera.
+config ATSHA204A
+ bool "Support for Atmel ATSHA204A module"
+ depends on MISC
+ help
+ Enable support for I2C connected Atmel's ATSHA204A
+ CryptoAuthentication module found for example on the Turris Omnia
+ board.
+
+config ROCKCHIP_EFUSE
+ bool "Rockchip e-fuse support"
+ depends on MISC
+ help
+ Enable (read-only) access for the e-fuse block found in Rockchip
+ SoCs: accesses can either be made using byte addressing and a length
+ or through child-nodes that are generated based on the e-fuse map
+ retrieved from the DTS.
+
+ This driver currently supports the RK3399 only, but can easily be
+ extended (by porting the read function from the Linux kernel sources)
+ to support other recent Rockchip devices.
+
+config VEXPRESS_CONFIG
+ bool "Enable support for Arm Versatile Express config bus"
+ depends on MISC
+ help
+ If you say Y here, you will get support for accessing the
+ configuration bus on the Arm Versatile Express boards via
+ a sysreg driver.
+
config CMD_CROS_EC
bool "Enable crosec command"
depends on CROS_EC
Security Monitor can be transitioned on any security failures,
like software violations or hardware security violations.
+config JZ4780_EFUSE
+ bool "Ingenic JZ4780 eFUSE support"
+ depends on ARCH_JZ47XX
+ help
+ This selects support for the eFUSE on Ingenic JZ4780 SoCs.
+
config MXC_OCOTP
bool "Enable MXC OCOTP Driver"
+ depends on ARCH_IMX8M || ARCH_MX6 || ARCH_MX7 || ARCH_VF610
+ default y
help
If you say Y here, you will get support for the One Time
Programmable memory pages that are stored on the some
help
The I2C address of the PCA9551 LED controller.
+config STM32MP_FUSE
+ bool "Enable STM32MP fuse wrapper providing the fuse API"
+ depends on ARCH_STM32MP && MISC
+ default y if CMD_FUSE
+ help
+ If you say Y here, you will get support for the fuse API (OTP)
+ for STM32MP architecture.
+ This API is needed for CMD_FUSE.
+
+config STM32_RCC
+ bool "Enable RCC driver for the STM32 SoC's family"
+ depends on (STM32 || ARCH_STM32MP) && MISC
+ help
+ Enable the STM32 RCC driver. The RCC block (Reset and Clock Control
+ block) is responsible of the management of the clock and reset
+ generation.
+ This driver is similar to an MFD driver in the Linux kernel.
+
config TEGRA_CAR
bool "Enable support for the Tegra CAR driver"
depends on TEGRA_NO_BPMP
can make requests to the BPMP. This driver is similar to an MFD
driver in the Linux kernel.
+config TWL4030_LED
+ bool "Enable TWL4030 LED controller"
+ help
+ Enable this to add support for the TWL4030 LED controller.
+
config WINBOND_W83627
bool "Enable Winbond Super I/O driver"
help
depends on MISC
help
Enable a generic driver for EEPROMs attached via I2C.
+
+
+config SPL_I2C_EEPROM
+ bool "Enable driver for generic I2C-attached EEPROMs for SPL"
+ depends on MISC && SPL && SPL_DM
+ help
+ This option is an SPL-variant of the I2C_EEPROM option.
+ See the help of I2C_EEPROM for details.
+
+config ZYNQ_GEM_I2C_MAC_OFFSET
+ hex "Set the I2C MAC offset"
+ default 0x0
+ depends on DM_I2C
+ help
+ Set the MAC offset for i2C.
+
+if I2C_EEPROM
+
+config SYS_I2C_EEPROM_ADDR
+ hex "Chip address of the EEPROM device"
+ default 0
+
+config SYS_I2C_EEPROM_BUS
+ int "I2C bus of the EEPROM device."
+ default 0
+
+config SYS_EEPROM_SIZE
+ int "Size in bytes of the EEPROM device"
+ default 256
+
+config SYS_EEPROM_PAGE_WRITE_BITS
+ int "Number of bits used to address bytes in a single page"
+ default 0
+ help
+ The EEPROM page size is 2^SYS_EEPROM_PAGE_WRITE_BITS.
+ A 64 byte page, for example would require six bits.
+
+config SYS_EEPROM_PAGE_WRITE_DELAY_MS
+ int "Number of milliseconds to delay between page writes"
+ default 0
+
+config SYS_I2C_EEPROM_ADDR_LEN
+ int "Length in bytes of the EEPROM memory array address"
+ default 1
+ help
+ Note: This is NOT the chip address length!
+
+config SYS_I2C_EEPROM_ADDR_OVERFLOW
+ hex "EEPROM Address Overflow"
+ default 0
+ help
+ EEPROM chips that implement "address overflow" are ones
+ like Catalyst 24WC04/08/16 which has 9/10/11 bits of
+ address and the extra bits end up in the "chip address" bit
+ slots. This makes a 24WC08 (1Kbyte) chip look like four 256
+ byte chips.
+
+endif
+
+config GDSYS_RXAUI_CTRL
+ bool "Enable gdsys RXAUI control driver"
+ depends on MISC
+ help
+ Support gdsys FPGA's RXAUI control.
+
+config GDSYS_IOEP
+ bool "Enable gdsys IOEP driver"
+ depends on MISC
+ help
+ Support gdsys FPGA's IO endpoint driver.
+
+config MPC83XX_SERDES
+ bool "Enable MPC83xx serdes driver"
+ depends on MISC
+ help
+ Support for serdes found on MPC83xx SoCs.
+
+config FS_LOADER
+ bool "Enable loader driver for file system"
+ help
+ This is file system generic loader which can be used to load
+ the file image from the storage into target such as memory.
+
+ The consumer driver would then use this loader to program whatever,
+ ie. the FPGA device.
+
+config GDSYS_SOC
+ bool "Enable gdsys SOC driver"
+ depends on MISC
+ help
+ Support for gdsys IHS SOC, a simple bus associated with each gdsys
+ IHS (Integrated Hardware Systems) FPGA, which holds all devices whose
+ register maps are contained within the FPGA's register map.
+
+config IHS_FPGA
+ bool "Enable IHS FPGA driver"
+ depends on MISC
+ help
+ Support IHS (Integrated Hardware Systems) FPGA, the main FPGAs on
+ gdsys devices, which supply the majority of the functionality offered
+ by the devices. This driver supports both CON and CPU variants of the
+ devices, depending on the device tree entry.
+
endmenu
projects / oweals / u-boot.git / blobdiff