#include <asm/io.h>
/*
- * include a file that will provide CONFIG_I2C_MVTWSI_BASE
+ * include a file that will provide CONFIG_I2C_MVTWSI_BASE*
* and possibly other settings
*/
#if defined(CONFIG_ORION5X)
#include <asm/arch/orion5x.h>
-#elif defined(CONFIG_KIRKWOOD)
+#elif (defined(CONFIG_KIRKWOOD) || defined(CONFIG_ARCH_MVEBU))
#include <asm/arch/soc.h>
#elif defined(CONFIG_SUNXI)
#include <asm/arch/i2c.h>
#define MVTWSI_CONTROL_TWSIEN 0x00000040
#define MVTWSI_CONTROL_INTEN 0x00000080
+/*
+ * On sun6i and newer IFLG is a write-clear bit which is cleared by writing 1,
+ * on other platforms it is a normal r/w bit which is cleared by writing 0.
+ */
+
+#ifdef CONFIG_SUNXI_GEN_SUN6I
+#define MVTWSI_CONTROL_CLEAR_IFLG 0x00000008
+#else
+#define MVTWSI_CONTROL_CLEAR_IFLG 0x00000000
+#endif
+
/*
* Status register values -- only those expected in normal master
* operation on non-10-bit-address devices; whatever status we don't
#define MVTWSI_STATUS_IDLE 0xF8
/*
- * The single instance of the controller we'll be dealing with
+ * MVTWSI controller base
*/
-static struct mvtwsi_registers *twsi =
- (struct mvtwsi_registers *) CONFIG_I2C_MVTWSI_BASE;
+static struct mvtwsi_registers *twsi_get_base(struct i2c_adapter *adap)
+{
+ switch (adap->hwadapnr) {
+#ifdef CONFIG_I2C_MVTWSI_BASE0
+ case 0:
+ return (struct mvtwsi_registers *) CONFIG_I2C_MVTWSI_BASE0;
+#endif
+#ifdef CONFIG_I2C_MVTWSI_BASE1
+ case 1:
+ return (struct mvtwsi_registers *) CONFIG_I2C_MVTWSI_BASE1;
+#endif
+#ifdef CONFIG_I2C_MVTWSI_BASE2
+ case 2:
+ return (struct mvtwsi_registers *) CONFIG_I2C_MVTWSI_BASE2;
+#endif
+#ifdef CONFIG_I2C_MVTWSI_BASE3
+ case 3:
+ return (struct mvtwsi_registers *) CONFIG_I2C_MVTWSI_BASE3;
+#endif
+#ifdef CONFIG_I2C_MVTWSI_BASE4
+ case 4:
+ return (struct mvtwsi_registers *) CONFIG_I2C_MVTWSI_BASE4;
+#endif
+#ifdef CONFIG_I2C_MVTWSI_BASE5
+ case 5:
+ return (struct mvtwsi_registers *) CONFIG_I2C_MVTWSI_BASE5;
+#endif
+ default:
+ printf("Missing mvtwsi controller %d base\n", adap->hwadapnr);
+ break;
+ }
+
+ return NULL;
+}
/*
* Returned statuses are 0 for success and nonzero otherwise.
* Wait for IFLG to raise, or return 'timeout'; then if status is as expected,
* return 0 (ok) or return 'wrong status'.
*/
-static int twsi_wait(int expected_status)
+static int twsi_wait(struct i2c_adapter *adap, int expected_status)
{
+ struct mvtwsi_registers *twsi = twsi_get_base(adap);
int control, status;
int timeout = 1000;
MVTWSI_ERROR_TIMEOUT, control, status, expected_status);
}
-/*
- * These flags are ORed to any write to the control register
- * They allow global setting of TWSIEN and ACK.
- * By default none are set.
- * twsi_start() sets TWSIEN (in case the controller was disabled)
- * twsi_recv() sets ACK or resets it depending on expected status.
- */
-static u8 twsi_control_flags = MVTWSI_CONTROL_TWSIEN;
-
/*
* Assert the START condition, either in a single I2C transaction
* or inside back-to-back ones (repeated starts).
*/
-static int twsi_start(int expected_status)
+static int twsi_start(struct i2c_adapter *adap, int expected_status, u8 *flags)
{
+ struct mvtwsi_registers *twsi = twsi_get_base(adap);
+
/* globally set TWSIEN in case it was not */
- twsi_control_flags |= MVTWSI_CONTROL_TWSIEN;
+ *flags |= MVTWSI_CONTROL_TWSIEN;
/* assert START */
- writel(twsi_control_flags | MVTWSI_CONTROL_START, &twsi->control);
+ writel(*flags | MVTWSI_CONTROL_START |
+ MVTWSI_CONTROL_CLEAR_IFLG, &twsi->control);
/* wait for controller to process START */
- return twsi_wait(expected_status);
+ return twsi_wait(adap, expected_status);
}
/*
* Send a byte (i2c address or data).
*/
-static int twsi_send(u8 byte, int expected_status)
+static int twsi_send(struct i2c_adapter *adap, u8 byte, int expected_status,
+ u8 *flags)
{
+ struct mvtwsi_registers *twsi = twsi_get_base(adap);
+
/* put byte in data register for sending */
writel(byte, &twsi->data);
/* clear any pending interrupt -- that'll cause sending */
- writel(twsi_control_flags, &twsi->control);
+ writel(*flags | MVTWSI_CONTROL_CLEAR_IFLG, &twsi->control);
/* wait for controller to receive byte and check ACK */
- return twsi_wait(expected_status);
+ return twsi_wait(adap, expected_status);
}
/*
* Receive a byte.
* Global mvtwsi_control_flags variable says if we should ack or nak.
*/
-static int twsi_recv(u8 *byte)
+static int twsi_recv(struct i2c_adapter *adap, u8 *byte, u8 *flags)
{
+ struct mvtwsi_registers *twsi = twsi_get_base(adap);
int expected_status, status;
/* compute expected status based on ACK bit in global control flags */
- if (twsi_control_flags & MVTWSI_CONTROL_ACK)
+ if (*flags & MVTWSI_CONTROL_ACK)
expected_status = MVTWSI_STATUS_DATA_R_ACK;
else
expected_status = MVTWSI_STATUS_DATA_R_NAK;
/* acknowledge *previous state* and launch receive */
- writel(twsi_control_flags, &twsi->control);
+ writel(*flags | MVTWSI_CONTROL_CLEAR_IFLG, &twsi->control);
/* wait for controller to receive byte and assert ACK or NAK */
- status = twsi_wait(expected_status);
+ status = twsi_wait(adap, expected_status);
/* if we did receive expected byte then store it */
if (status == 0)
*byte = readl(&twsi->data);
* Assert the STOP condition.
* This is also used to force the bus back in idle (SDA=SCL=1).
*/
-static int twsi_stop(int status)
+static int twsi_stop(struct i2c_adapter *adap, int status)
{
+ struct mvtwsi_registers *twsi = twsi_get_base(adap);
int control, stop_status;
int timeout = 1000;
/* assert STOP */
control = MVTWSI_CONTROL_TWSIEN | MVTWSI_CONTROL_STOP;
- writel(control, &twsi->control);
+ writel(control | MVTWSI_CONTROL_CLEAR_IFLG, &twsi->control);
/* wait for IDLE; IFLG won't rise so twsi_wait() is no use. */
do {
stop_status = readl(&twsi->status);
return status;
}
-/*
- * Ugly formula to convert m and n values to a frequency comes from
- * TWSI specifications
- */
-
-#define TWSI_FREQUENCY(m, n) \
- (CONFIG_SYS_TCLK / (10 * (m + 1) * (1 << n)))
+static unsigned int twsi_calc_freq(const int n, const int m)
+{
+#ifdef CONFIG_SUNXI
+ return CONFIG_SYS_TCLK / (10 * (m + 1) * (1 << n));
+#else
+ return CONFIG_SYS_TCLK / (10 * (m + 1) * (2 << n));
+#endif
+}
/*
* Reset controller.
*/
static void twsi_reset(struct i2c_adapter *adap)
{
- /* ensure controller will be enabled by any twsi*() function */
- twsi_control_flags = MVTWSI_CONTROL_TWSIEN;
+ struct mvtwsi_registers *twsi = twsi_get_base(adap);
+
/* reset controller */
writel(0, &twsi->soft_reset);
/* wait 2 ms -- this is what the Marvell LSP does */
static unsigned int twsi_i2c_set_bus_speed(struct i2c_adapter *adap,
unsigned int requested_speed)
{
+ struct mvtwsi_registers *twsi = twsi_get_base(adap);
unsigned int tmp_speed, highest_speed, n, m;
unsigned int baud = 0x44; /* baudrate at controller reset */
/* compute m, n setting for highest speed not above requested speed */
for (n = 0; n < 8; n++) {
for (m = 0; m < 16; m++) {
- tmp_speed = TWSI_FREQUENCY(m, n);
+ tmp_speed = twsi_calc_freq(n, m);
if ((tmp_speed <= requested_speed)
&& (tmp_speed > highest_speed)) {
highest_speed = tmp_speed;
static void twsi_i2c_init(struct i2c_adapter *adap, int speed, int slaveadd)
{
+ struct mvtwsi_registers *twsi = twsi_get_base(adap);
+
/* reset controller */
twsi_reset(adap);
/* set speed */
writel(slaveadd, &twsi->slave_address);
writel(0, &twsi->xtnd_slave_addr);
/* assert STOP but don't care for the result */
- (void) twsi_stop(0);
+ (void) twsi_stop(adap, 0);
}
/*
* Common to i2c_probe, i2c_read and i2c_write.
* Expected address status will derive from direction bit (bit 0) in addr.
*/
-static int i2c_begin(int expected_start_status, u8 addr)
+static int i2c_begin(struct i2c_adapter *adap, int expected_start_status,
+ u8 addr, u8 *flags)
{
int status, expected_addr_status;
else /* writing */
expected_addr_status = MVTWSI_STATUS_ADDR_W_ACK;
/* assert START */
- status = twsi_start(expected_start_status);
+ status = twsi_start(adap, expected_start_status, flags);
/* send out the address if the start went well */
if (status == 0)
- status = twsi_send(addr, expected_addr_status);
+ status = twsi_send(adap, addr, expected_addr_status,
+ flags);
/* return ok or status of first failure to caller */
return status;
}
static int twsi_i2c_probe(struct i2c_adapter *adap, uchar chip)
{
u8 dummy_byte;
+ u8 flags = 0;
int status;
/* begin i2c read */
- status = i2c_begin(MVTWSI_STATUS_START, (chip << 1) | 1);
+ status = i2c_begin(adap, MVTWSI_STATUS_START, (chip << 1) | 1, &flags);
/* dummy read was accepted: receive byte but NAK it. */
if (status == 0)
- status = twsi_recv(&dummy_byte);
+ status = twsi_recv(adap, &dummy_byte, &flags);
/* Stop transaction */
- twsi_stop(0);
+ twsi_stop(adap, 0);
/* return 0 or status of first failure */
return status;
}
int alen, uchar *data, int length)
{
int status;
+ u8 flags = 0;
/* begin i2c write to send the address bytes */
- status = i2c_begin(MVTWSI_STATUS_START, (chip << 1));
+ status = i2c_begin(adap, MVTWSI_STATUS_START, (chip << 1), &flags);
/* send addr bytes */
while ((status == 0) && alen--)
- status = twsi_send(addr >> (8*alen),
- MVTWSI_STATUS_DATA_W_ACK);
+ status = twsi_send(adap, addr >> (8*alen),
+ MVTWSI_STATUS_DATA_W_ACK, &flags);
/* begin i2c read to receive eeprom data bytes */
if (status == 0)
- status = i2c_begin(
- MVTWSI_STATUS_REPEATED_START, (chip << 1) | 1);
+ status = i2c_begin(adap, MVTWSI_STATUS_REPEATED_START,
+ (chip << 1) | 1, &flags);
/* prepare ACK if at least one byte must be received */
if (length > 0)
- twsi_control_flags |= MVTWSI_CONTROL_ACK;
+ flags |= MVTWSI_CONTROL_ACK;
/* now receive actual bytes */
while ((status == 0) && length--) {
/* reset NAK if we if no more to read now */
if (length == 0)
- twsi_control_flags &= ~MVTWSI_CONTROL_ACK;
+ flags &= ~MVTWSI_CONTROL_ACK;
/* read current byte */
- status = twsi_recv(data++);
+ status = twsi_recv(adap, data++, &flags);
}
/* Stop transaction */
- status = twsi_stop(status);
+ status = twsi_stop(adap, status);
/* return 0 or status of first failure */
return status;
}
int alen, uchar *data, int length)
{
int status;
+ u8 flags = 0;
/* begin i2c write to send the eeprom adress bytes then data bytes */
- status = i2c_begin(MVTWSI_STATUS_START, (chip << 1));
+ status = i2c_begin(adap, MVTWSI_STATUS_START, (chip << 1), &flags);
/* send addr bytes */
while ((status == 0) && alen--)
- status = twsi_send(addr >> (8*alen),
- MVTWSI_STATUS_DATA_W_ACK);
+ status = twsi_send(adap, addr >> (8*alen),
+ MVTWSI_STATUS_DATA_W_ACK, &flags);
/* send data bytes */
while ((status == 0) && (length-- > 0))
- status = twsi_send(*(data++), MVTWSI_STATUS_DATA_W_ACK);
+ status = twsi_send(adap, *(data++), MVTWSI_STATUS_DATA_W_ACK,
+ &flags);
/* Stop transaction */
- status = twsi_stop(status);
+ status = twsi_stop(adap, status);
/* return 0 or status of first failure */
return status;
}
+#ifdef CONFIG_I2C_MVTWSI_BASE0
U_BOOT_I2C_ADAP_COMPLETE(twsi0, twsi_i2c_init, twsi_i2c_probe,
twsi_i2c_read, twsi_i2c_write,
twsi_i2c_set_bus_speed,
CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 0)
+#endif
+#ifdef CONFIG_I2C_MVTWSI_BASE1
+U_BOOT_I2C_ADAP_COMPLETE(twsi1, twsi_i2c_init, twsi_i2c_probe,
+ twsi_i2c_read, twsi_i2c_write,
+ twsi_i2c_set_bus_speed,
+ CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 1)
+
+#endif
+#ifdef CONFIG_I2C_MVTWSI_BASE2
+U_BOOT_I2C_ADAP_COMPLETE(twsi2, twsi_i2c_init, twsi_i2c_probe,
+ twsi_i2c_read, twsi_i2c_write,
+ twsi_i2c_set_bus_speed,
+ CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 2)
+
+#endif
+#ifdef CONFIG_I2C_MVTWSI_BASE3
+U_BOOT_I2C_ADAP_COMPLETE(twsi3, twsi_i2c_init, twsi_i2c_probe,
+ twsi_i2c_read, twsi_i2c_write,
+ twsi_i2c_set_bus_speed,
+ CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 3)
+
+#endif
+#ifdef CONFIG_I2C_MVTWSI_BASE4
+U_BOOT_I2C_ADAP_COMPLETE(twsi4, twsi_i2c_init, twsi_i2c_probe,
+ twsi_i2c_read, twsi_i2c_write,
+ twsi_i2c_set_bus_speed,
+ CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 4)
+
+#endif
+#ifdef CONFIG_I2C_MVTWSI_BASE5
+U_BOOT_I2C_ADAP_COMPLETE(twsi5, twsi_i2c_init, twsi_i2c_probe,
+ twsi_i2c_read, twsi_i2c_write,
+ twsi_i2c_set_bus_speed,
+ CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 5)
+
+#endif
projects / oweals / u-boot.git / blobdiff