colibri_imx6: remove legacy sdboot wrapper

[oweals/u-boot.git] / drivers / i2c / imx_lpi2c.c

diff --git a/drivers/i2c/imx_lpi2c.c b/drivers/i2c/imx_lpi2c.c
index f792d4432daf38d68d8c14b0b272c602ef70c352..4586d4331fad9df171445aaf7248fdd1133d2152 100644 (file)
--- a/drivers/i2c/imx_lpi2c.c
+++ b/drivers/i2c/imx_lpi2c.c
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright 2016 Freescale Semiconductors, Inc.
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
@@ -9,25 +8,26 @@
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
-#include <asm/arch/imx_lpi2c.h>
+#include <imx_lpi2c.h>
 #include <asm/arch/sys_proto.h>
 #include <dm.h>
 #include <fdtdec.h>
 #include <i2c.h>
 
-DECLARE_GLOBAL_DATA_PTR;
 #define LPI2C_FIFO_SIZE 4
+#define LPI2C_NACK_TOUT_MS 1
 #define LPI2C_TIMEOUT_MS 100
 
+static int bus_i2c_init(struct udevice *bus, int speed);
+
 /* Weak linked function for overridden by some SoC power function */
 int __weak init_i2c_power(unsigned i2c_num)
 {
        return 0;
 }
 
-static int imx_lpci2c_check_busy_bus(struct udevice *bus)
+static int imx_lpci2c_check_busy_bus(const struct imx_lpi2c_reg *regs)
 {
-       struct imx_lpi2c_reg *regs = (struct imx_lpi2c_reg *)dev_get_addr(bus);
        lpi2c_status_t result = LPI2C_SUCESS;
        u32 status;
 
@@ -39,9 +39,8 @@ static int imx_lpci2c_check_busy_bus(struct udevice *bus)
        return result;
 }
 
-static int imx_lpci2c_check_clear_error(struct udevice *bus)
+static int imx_lpci2c_check_clear_error(struct imx_lpi2c_reg *regs)
 {
-       struct imx_lpi2c_reg *regs = (struct imx_lpi2c_reg *)dev_get_addr(bus);
        lpi2c_status_t result = LPI2C_SUCESS;
        u32 val, status;
 
@@ -71,9 +70,8 @@ static int imx_lpci2c_check_clear_error(struct udevice *bus)
        return result;
 }
 
-static int bus_i2c_wait_for_tx_ready(struct udevice *bus)
+static int bus_i2c_wait_for_tx_ready(struct imx_lpi2c_reg *regs)
 {
-       struct imx_lpi2c_reg *regs = (struct imx_lpi2c_reg *)dev_get_addr(bus);
        lpi2c_status_t result = LPI2C_SUCESS;
        u32 txcount = 0;
        ulong start_time = get_timer(0);
@@ -81,7 +79,7 @@ static int bus_i2c_wait_for_tx_ready(struct udevice *bus)
        do {
                txcount = LPI2C_MFSR_TXCOUNT(readl(&regs->mfsr));
                txcount = LPI2C_FIFO_SIZE - txcount;
-               result = imx_lpci2c_check_clear_error(bus);
+               result = imx_lpci2c_check_clear_error(regs);
                if (result) {
                        debug("i2c: wait for tx ready: result 0x%x\n", result);
                        return result;
@@ -97,7 +95,7 @@ static int bus_i2c_wait_for_tx_ready(struct udevice *bus)
 
 static int bus_i2c_send(struct udevice *bus, u8 *txbuf, int len)
 {
-       struct imx_lpi2c_reg *regs = (struct imx_lpi2c_reg *)dev_get_addr(bus);
+       struct imx_lpi2c_reg *regs = (struct imx_lpi2c_reg *)devfdt_get_addr(bus);
        lpi2c_status_t result = LPI2C_SUCESS;
 
        /* empty tx */
@@ -105,9 +103,9 @@ static int bus_i2c_send(struct udevice *bus, u8 *txbuf, int len)
                return result;
 
        while (len--) {
-               result = bus_i2c_wait_for_tx_ready(bus);
+               result = bus_i2c_wait_for_tx_ready(regs);
                if (result) {
-                       debug("i2c: send wait fot tx ready: %d\n", result);
+                       debug("i2c: send wait for tx ready: %d\n", result);
                        return result;
                }
                writel(*txbuf++, &regs->mtdr);
@@ -118,7 +116,7 @@ static int bus_i2c_send(struct udevice *bus, u8 *txbuf, int len)
 
 static int bus_i2c_receive(struct udevice *bus, u8 *rxbuf, int len)
 {
-       struct imx_lpi2c_reg *regs = (struct imx_lpi2c_reg *)dev_get_addr(bus);
+       struct imx_lpi2c_reg *regs = (struct imx_lpi2c_reg *)devfdt_get_addr(bus);
        lpi2c_status_t result = LPI2C_SUCESS;
        u32 val;
        ulong start_time = get_timer(0);
@@ -127,7 +125,7 @@ static int bus_i2c_receive(struct udevice *bus, u8 *rxbuf, int len)
        if (!len)
                return result;
 
-       result = bus_i2c_wait_for_tx_ready(bus);
+       result = bus_i2c_wait_for_tx_ready(regs);
        if (result) {
                debug("i2c: receive wait fot tx ready: %d\n", result);
                return result;
@@ -141,9 +139,10 @@ static int bus_i2c_receive(struct udevice *bus, u8 *rxbuf, int len)
 
        while (len--) {
                do {
-                       result = imx_lpci2c_check_clear_error(bus);
+                       result = imx_lpci2c_check_clear_error(regs);
                        if (result) {
-                               debug("i2c: receive check clear error: %d\n", result);
+                               debug("i2c: receive check clear error: %d\n",
+                                     result);
                                return result;
                        }
                        if (get_timer(start_time) > LPI2C_TIMEOUT_MS) {
@@ -160,14 +159,22 @@ static int bus_i2c_receive(struct udevice *bus, u8 *rxbuf, int len)
 
 static int bus_i2c_start(struct udevice *bus, u8 addr, u8 dir)
 {
-       struct imx_lpi2c_reg *regs = (struct imx_lpi2c_reg *)dev_get_addr(bus);
-       lpi2c_status_t result = LPI2C_SUCESS;
+       lpi2c_status_t result;
+       struct imx_lpi2c_reg *regs =
+               (struct imx_lpi2c_reg *)devfdt_get_addr(bus);
        u32 val;
 
-       result = imx_lpci2c_check_busy_bus(bus);
+       result = imx_lpci2c_check_busy_bus(regs);
        if (result) {
                debug("i2c: start check busy bus: 0x%x\n", result);
-               return result;
+
+               /* Try to init the lpi2c then check the bus busy again */
+               bus_i2c_init(bus, 100000);
+               result = imx_lpci2c_check_busy_bus(regs);
+               if (result) {
+                       printf("i2c: Error check busy bus: 0x%x\n", result);
+                       return result;
+               }
        }
        /* clear all status flags */
        writel(0x7f00, &regs->msr);
@@ -175,7 +182,7 @@ static int bus_i2c_start(struct udevice *bus, u8 addr, u8 dir)
        val = readl(&regs->mcfgr1) & ~LPI2C_MCFGR1_AUTOSTOP_MASK;
        writel(val, &regs->mcfgr1);
        /* wait tx fifo ready */
-       result = bus_i2c_wait_for_tx_ready(bus);
+       result = bus_i2c_wait_for_tx_ready(regs);
        if (result) {
                debug("i2c: start wait for tx ready: 0x%x\n", result);
                return result;
@@ -186,13 +193,16 @@ static int bus_i2c_start(struct udevice *bus, u8 addr, u8 dir)
 
        return result;
 }
+
 static int bus_i2c_stop(struct udevice *bus)
 {
-       struct imx_lpi2c_reg *regs = (struct imx_lpi2c_reg *)dev_get_addr(bus);
-       lpi2c_status_t result = LPI2C_SUCESS;
+       lpi2c_status_t result;
+       struct imx_lpi2c_reg *regs =
+               (struct imx_lpi2c_reg *)devfdt_get_addr(bus);
        u32 status;
+       ulong start_time;
 
-       result = bus_i2c_wait_for_tx_ready(bus);
+       result = bus_i2c_wait_for_tx_ready(regs);
        if (result) {
                debug("i2c: stop wait for tx ready: 0x%x\n", result);
                return result;
@@ -201,9 +211,10 @@ static int bus_i2c_stop(struct udevice *bus)
        /* send stop command */
        writel(LPI2C_MTDR_CMD(0x2), &regs->mtdr);
 
-       while (result == LPI2C_SUCESS) {
+       start_time = get_timer(0);
+       while (1) {
                status = readl(&regs->msr);
-               result = imx_lpci2c_check_clear_error(bus);
+               result = imx_lpci2c_check_clear_error(regs);
                /* stop detect flag */
                if (status & LPI2C_MSR_SDF_MASK) {
                        /* clear stop flag */
@@ -211,6 +222,11 @@ static int bus_i2c_stop(struct udevice *bus)
                        writel(status, &regs->msr);
                        break;
                }
+
+               if (get_timer(start_time) > LPI2C_NACK_TOUT_MS) {
+                       debug("stop timeout\n");
+                       return -ETIMEDOUT;
+               }
        }
 
        return result;
@@ -218,15 +234,12 @@ static int bus_i2c_stop(struct udevice *bus)
 
 static int bus_i2c_read(struct udevice *bus, u32 chip, u8 *buf, int len)
 {
-       lpi2c_status_t result = LPI2C_SUCESS;
+       lpi2c_status_t result;
 
        result = bus_i2c_start(bus, chip, 1);
        if (result)
                return result;
        result = bus_i2c_receive(bus, buf, len);
-       if (result)
-               return result;
-       result = bus_i2c_stop(bus);
        if (result)
                return result;
 
@@ -235,15 +248,12 @@ static int bus_i2c_read(struct udevice *bus, u32 chip, u8 *buf, int len)
 
 static int bus_i2c_write(struct udevice *bus, u32 chip, u8 *buf, int len)
 {
-       lpi2c_status_t result = LPI2C_SUCESS;
+       lpi2c_status_t result;
 
        result = bus_i2c_start(bus, chip, 0);
        if (result)
                return result;
        result = bus_i2c_send(bus, buf, len);
-       if (result)
-               return result;
-       result = bus_i2c_stop(bus);
        if (result)
                return result;
 
@@ -251,9 +261,15 @@ static int bus_i2c_write(struct udevice *bus, u32 chip, u8 *buf, int len)
 }
 
 
+u32 __weak imx_get_i2cclk(u32 i2c_num)
+{
+       return 0;
+}
+
 static int bus_i2c_set_bus_speed(struct udevice *bus, int speed)
 {
-       struct imx_lpi2c_reg *regs = (struct imx_lpi2c_reg *)dev_get_addr(bus);
+       struct imx_lpi2c_bus *i2c_bus = dev_get_priv(bus);
+       struct imx_lpi2c_reg *regs;
        u32 val;
        u32 preescale = 0, best_pre = 0, clkhi = 0;
        u32 best_clkhi = 0, abs_error = 0, rate;
@@ -262,9 +278,19 @@ static int bus_i2c_set_bus_speed(struct udevice *bus, int speed)
        bool mode;
        int i;
 
-       clock_rate = imx_get_i2cclk(bus->seq + 4);
-       if (!clock_rate)
-               return -EPERM;
+       regs = (struct imx_lpi2c_reg *)devfdt_get_addr(bus);
+
+       if (IS_ENABLED(CONFIG_CLK)) {
+               clock_rate = clk_get_rate(&i2c_bus->per_clk);
+               if (clock_rate <= 0) {
+                       dev_err(bus, "Failed to get i2c clk: %d\n", clock_rate);
+                       return clock_rate;
+               }
+       } else {
+               clock_rate = imx_get_i2cclk(bus->seq);
+               if (!clock_rate)
+                       return -EPERM;
+       }
 
        mode = (readl(&regs->mcr) & LPI2C_MCR_MEN_MASK) >> LPI2C_MCR_MEN_SHIFT;
        /* disable master mode */
@@ -320,10 +346,11 @@ static int bus_i2c_set_bus_speed(struct udevice *bus, int speed)
 
 static int bus_i2c_init(struct udevice *bus, int speed)
 {
-       struct imx_lpi2c_reg *regs = (struct imx_lpi2c_reg *)dev_get_addr(bus);
+       struct imx_lpi2c_reg *regs;
        u32 val;
        int ret;
 
+       regs = (struct imx_lpi2c_reg *)devfdt_get_addr(bus);
        /* reset peripheral */
        writel(LPI2C_MCR_RST_MASK, &regs->mcr);
        writel(0x0, &regs->mcr);
@@ -356,7 +383,7 @@ static int bus_i2c_init(struct udevice *bus, int speed)
 static int imx_lpi2c_probe_chip(struct udevice *bus, u32 chip,
                                u32 chip_flags)
 {
-       lpi2c_status_t result = LPI2C_SUCESS;
+       lpi2c_status_t result;
 
        result = bus_i2c_start(bus, chip, 0);
        if (result) {
@@ -366,23 +393,20 @@ static int imx_lpi2c_probe_chip(struct udevice *bus, u32 chip,
        }
 
        result = bus_i2c_stop(bus);
-       if (result) {
+       if (result)
                bus_i2c_init(bus, 100000);
-               return -result;
-       }
 
        return result;
 }
 
 static int imx_lpi2c_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs)
 {
-       int ret = 0;
+       int ret = 0, ret_stop;
 
        for (; nmsgs > 0; nmsgs--, msg++) {
                debug("i2c_xfer: chip=0x%x, len=0x%x\n", msg->addr, msg->len);
                if (msg->flags & I2C_M_RD)
-                       ret = bus_i2c_read(bus, msg->addr, msg->buf,
-                                          msg->len);
+                       ret = bus_i2c_read(bus, msg->addr, msg->buf, msg->len);
                else {
                        ret = bus_i2c_write(bus, msg->addr, msg->buf,
                                            msg->len);
@@ -394,6 +418,12 @@ static int imx_lpi2c_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs)
        if (ret)
                debug("i2c_write: error sending\n");
 
+       ret_stop = bus_i2c_stop(bus);
+       if (ret_stop)
+               debug("i2c_xfer: stop bus error\n");
+
+       ret |= ret_stop;
+
        return ret;
 }
 
@@ -402,6 +432,11 @@ static int imx_lpi2c_set_bus_speed(struct udevice *bus, unsigned int speed)
        return bus_i2c_set_bus_speed(bus, speed);
 }
 
+__weak int enable_i2c_clk(unsigned char enable, unsigned int i2c_num)
+{
+       return 0;
+}
+
 static int imx_lpi2c_probe(struct udevice *bus)
 {
        struct imx_lpi2c_bus *i2c_bus = dev_get_priv(bus);
@@ -410,31 +445,44 @@ static int imx_lpi2c_probe(struct udevice *bus)
 
        i2c_bus->driver_data = dev_get_driver_data(bus);
 
-       addr = dev_get_addr(bus);
+       addr = devfdt_get_addr(bus);
        if (addr == FDT_ADDR_T_NONE)
-               return -ENODEV;
+               return -EINVAL;
 
        i2c_bus->base = addr;
        i2c_bus->index = bus->seq;
        i2c_bus->bus = bus;
 
        /* power up i2c resource */
-       ret = init_i2c_power(bus->seq + 4);
+       ret = init_i2c_power(bus->seq);
        if (ret) {
                debug("init_i2c_power err = %d\n", ret);
                return ret;
        }
 
-       /* Enable clk, only i2c4-7 can be handled by A7 core */
-       ret = enable_i2c_clk(1, bus->seq + 4);
-       if (ret < 0)
-               return ret;
+       if (IS_ENABLED(CONFIG_CLK)) {
+               ret = clk_get_by_name(bus, "per", &i2c_bus->per_clk);
+               if (ret) {
+                       dev_err(bus, "Failed to get per clk\n");
+                       return ret;
+               }
+               ret = clk_enable(&i2c_bus->per_clk);
+               if (ret) {
+                       dev_err(bus, "Failed to enable per clk\n");
+                       return ret;
+               }
+       } else {
+               /* To i.MX7ULP, only i2c4-7 can be handled by A7 core */
+               ret = enable_i2c_clk(1, bus->seq);
+               if (ret < 0)
+                       return ret;
+       }
 
        ret = bus_i2c_init(bus, 100000);
        if (ret < 0)
                return ret;
 
-       debug("i2c : controller bus %d at %lu , speed %d: ",
+       debug("i2c : controller bus %d at 0x%lx , speed %d: ",
              bus->seq, i2c_bus->base,
              i2c_bus->speed);
 
@@ -449,6 +497,7 @@ static const struct dm_i2c_ops imx_lpi2c_ops = {
 
 static const struct udevice_id imx_lpi2c_ids[] = {
        { .compatible = "fsl,imx7ulp-lpi2c", },
+       { .compatible = "fsl,imx8qm-lpi2c", },
        {}
 };