ARM: uniphier: add EHCI nodes for PH1-LD11
[oweals/u-boot.git] / drivers / i2c / ihs_i2c.c
index 737beaf21830237935889073b138fd123abf996a..b05c15f8cb0bd197dddee11b3b6f0c06d8e29f67 100644 (file)
@@ -13,24 +13,28 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #ifdef CONFIG_SYS_I2C_IHS_DUAL
 #define I2C_SET_REG(fld, val) \
-       { if (I2C_ADAP_HWNR & 0x10) \
-               FPGA_SET_REG(I2C_ADAP_HWNR & 0xf, i2c1.fld, val); \
-       else \
-               FPGA_SET_REG(I2C_ADAP_HWNR, i2c0.fld, val); }
+       do { \
+               if (I2C_ADAP_HWNR & 0x10) \
+                       FPGA_SET_REG(I2C_ADAP_HWNR & 0xf, i2c1.fld, val); \
+               else \
+                       FPGA_SET_REG(I2C_ADAP_HWNR, i2c0.fld, val); \
+       } while (0)
 #else
 #define I2C_SET_REG(fld, val) \
-               FPGA_SET_REG(I2C_ADAP_HWNR, i2c0.fld, val);
+               FPGA_SET_REG(I2C_ADAP_HWNR, i2c0.fld, val)
 #endif
 
 #ifdef CONFIG_SYS_I2C_IHS_DUAL
 #define I2C_GET_REG(fld, val) \
-       { if (I2C_ADAP_HWNR & 0x10) \
-               FPGA_GET_REG(I2C_ADAP_HWNR & 0xf, i2c1.fld, val); \
-       else \
-               FPGA_GET_REG(I2C_ADAP_HWNR, i2c0.fld, val); }
+       do {                                    \
+               if (I2C_ADAP_HWNR & 0x10) \
+                       FPGA_GET_REG(I2C_ADAP_HWNR & 0xf, i2c1.fld, val); \
+               else \
+                       FPGA_GET_REG(I2C_ADAP_HWNR, i2c0.fld, val); \
+       } while (0)
 #else
 #define I2C_GET_REG(fld, val) \
-               FPGA_GET_REG(I2C_ADAP_HWNR, i2c0.fld, val);
+               FPGA_GET_REG(I2C_ADAP_HWNR, i2c0.fld, val)
 #endif
 
 enum {
@@ -131,7 +135,7 @@ static int ihs_i2c_access(struct i2c_adapter *adap, uchar chip, uint addr,
        if (len <= 0)
                return 1;
 
-       if (ihs_i2c_address(chip, addr, alen, !read))
+       if (ihs_i2c_address(chip, addr, alen, len))
                return 1;
 
        while (len) {