+// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2009
* Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
+#include <clk.h>
#include <common.h>
#include <dm.h>
#include <i2c.h>
#include <pci.h>
+#include <reset.h>
#include <asm/io.h>
#include "designware_i2c.h"
struct dw_i2c {
struct i2c_regs *regs;
struct dw_scl_sda_cfg *scl_sda_cfg;
+ struct reset_ctl_bulk resets;
+#if CONFIG_IS_ENABLED(CLK)
+ struct clk clk;
+#endif
};
#ifdef CONFIG_SYS_I2C_DW_ENABLE_STATUS_UNSUPPORTED
-static void dw_i2c_enable(struct i2c_regs *i2c_base, bool enable)
+static int dw_i2c_enable(struct i2c_regs *i2c_base, bool enable)
{
u32 ena = enable ? IC_ENABLE_0B : 0;
writel(ena, &i2c_base->ic_enable);
+
+ return 0;
}
#else
-static void dw_i2c_enable(struct i2c_regs *i2c_base, bool enable)
+static int dw_i2c_enable(struct i2c_regs *i2c_base, bool enable)
{
u32 ena = enable ? IC_ENABLE_0B : 0;
int timeout = 100;
do {
writel(ena, &i2c_base->ic_enable);
if ((readl(&i2c_base->ic_enable_status) & IC_ENABLE_0B) == ena)
- return;
+ return 0;
/*
* Wait 10 times the signaling period of the highest I2C
*/
udelay(25);
} while (timeout--);
-
printf("timeout in %sabling I2C adapter\n", enable ? "en" : "dis");
+
+ return -ETIMEDOUT;
}
#endif
*/
static unsigned int __dw_i2c_set_bus_speed(struct i2c_regs *i2c_base,
struct dw_scl_sda_cfg *scl_sda_cfg,
- unsigned int speed)
+ unsigned int speed,
+ unsigned int bus_mhz)
{
unsigned int cntl;
unsigned int hcnt, lcnt;
+ unsigned int ena;
int i2c_spd;
if (speed >= I2C_MAX_SPEED)
else
i2c_spd = IC_SPEED_MODE_STANDARD;
+ /* Get enable setting for restore later */
+ ena = readl(&i2c_base->ic_enable) & IC_ENABLE_0B;
+
/* to set speed cltr must be disabled */
dw_i2c_enable(i2c_base, false);
hcnt = scl_sda_cfg->fs_hcnt;
lcnt = scl_sda_cfg->fs_lcnt;
} else {
- hcnt = (IC_CLK * MIN_HS_SCL_HIGHTIME) / NANO_TO_MICRO;
- lcnt = (IC_CLK * MIN_HS_SCL_LOWTIME) / NANO_TO_MICRO;
+ hcnt = (bus_mhz * MIN_HS_SCL_HIGHTIME) / NANO_TO_MICRO;
+ lcnt = (bus_mhz * MIN_HS_SCL_LOWTIME) / NANO_TO_MICRO;
}
writel(hcnt, &i2c_base->ic_hs_scl_hcnt);
writel(lcnt, &i2c_base->ic_hs_scl_lcnt);
hcnt = scl_sda_cfg->ss_hcnt;
lcnt = scl_sda_cfg->ss_lcnt;
} else {
- hcnt = (IC_CLK * MIN_SS_SCL_HIGHTIME) / NANO_TO_MICRO;
- lcnt = (IC_CLK * MIN_SS_SCL_LOWTIME) / NANO_TO_MICRO;
+ hcnt = (bus_mhz * MIN_SS_SCL_HIGHTIME) / NANO_TO_MICRO;
+ lcnt = (bus_mhz * MIN_SS_SCL_LOWTIME) / NANO_TO_MICRO;
}
writel(hcnt, &i2c_base->ic_ss_scl_hcnt);
writel(lcnt, &i2c_base->ic_ss_scl_lcnt);
hcnt = scl_sda_cfg->fs_hcnt;
lcnt = scl_sda_cfg->fs_lcnt;
} else {
- hcnt = (IC_CLK * MIN_FS_SCL_HIGHTIME) / NANO_TO_MICRO;
- lcnt = (IC_CLK * MIN_FS_SCL_LOWTIME) / NANO_TO_MICRO;
+ hcnt = (bus_mhz * MIN_FS_SCL_HIGHTIME) / NANO_TO_MICRO;
+ lcnt = (bus_mhz * MIN_FS_SCL_LOWTIME) / NANO_TO_MICRO;
}
writel(hcnt, &i2c_base->ic_fs_scl_hcnt);
writel(lcnt, &i2c_base->ic_fs_scl_lcnt);
if (scl_sda_cfg)
writel(scl_sda_cfg->sda_hold, &i2c_base->ic_sda_hold);
- /* Enable back i2c now speed set */
- dw_i2c_enable(i2c_base, true);
+ /* Restore back i2c now speed set */
+ if (ena == IC_ENABLE_0B)
+ dw_i2c_enable(i2c_base, true);
return 0;
}
*
* Initialization function.
*/
-static void __dw_i2c_init(struct i2c_regs *i2c_base, int speed, int slaveaddr)
+static int __dw_i2c_init(struct i2c_regs *i2c_base, int speed, int slaveaddr)
{
+ int ret;
+
/* Disable i2c */
- dw_i2c_enable(i2c_base, false);
+ ret = dw_i2c_enable(i2c_base, false);
+ if (ret)
+ return ret;
writel(IC_CON_SD | IC_CON_RE | IC_CON_SPD_FS | IC_CON_MM,
&i2c_base->ic_con);
writel(IC_TX_TL, &i2c_base->ic_tx_tl);
writel(IC_STOP_DET, &i2c_base->ic_intr_mask);
#ifndef CONFIG_DM_I2C
- __dw_i2c_set_bus_speed(i2c_base, NULL, speed);
+ __dw_i2c_set_bus_speed(i2c_base, NULL, speed, IC_CLK);
writel(slaveaddr, &i2c_base->ic_sar);
#endif
/* Enable i2c */
- dw_i2c_enable(i2c_base, true);
+ ret = dw_i2c_enable(i2c_base, true);
+ if (ret)
+ return ret;
+
+ return 0;
}
#ifndef CONFIG_DM_I2C
unsigned int speed)
{
adap->speed = speed;
- return __dw_i2c_set_bus_speed(i2c_get_base(adap), NULL, speed);
+ return __dw_i2c_set_bus_speed(i2c_get_base(adap), NULL, speed, IC_CLK);
}
static void dw_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)
static int designware_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)
{
struct dw_i2c *i2c = dev_get_priv(bus);
+ ulong rate;
+
+#if CONFIG_IS_ENABLED(CLK)
+ rate = clk_get_rate(&i2c->clk);
+ if (IS_ERR_VALUE(rate))
+ return -EINVAL;
- return __dw_i2c_set_bus_speed(i2c->regs, i2c->scl_sda_cfg, speed);
+ /* Convert to MHz */
+ rate /= 1000000;
+#else
+ rate = IC_CLK;
+#endif
+ return __dw_i2c_set_bus_speed(i2c->regs, i2c->scl_sda_cfg, speed,
+ rate);
}
static int designware_i2c_probe_chip(struct udevice *bus, uint chip_addr,
static int designware_i2c_probe(struct udevice *bus)
{
struct dw_i2c *priv = dev_get_priv(bus);
+ int ret;
if (device_is_on_pci_bus(bus)) {
#ifdef CONFIG_DM_PCI
priv->regs = (struct i2c_regs *)devfdt_get_addr_ptr(bus);
}
- __dw_i2c_init(priv->regs, 0, 0);
+ ret = reset_get_bulk(bus, &priv->resets);
+ if (ret)
+ dev_warn(bus, "Can't get reset: %d\n", ret);
+ else
+ reset_deassert_bulk(&priv->resets);
- return 0;
+#if CONFIG_IS_ENABLED(CLK)
+ ret = clk_get_by_index(bus, 0, &priv->clk);
+ if (ret)
+ return ret;
+
+ ret = clk_enable(&priv->clk);
+ if (ret && ret != -ENOSYS && ret != -ENOTSUPP) {
+ clk_free(&priv->clk);
+ dev_err(bus, "failed to enable clock\n");
+ return ret;
+ }
+#endif
+
+ return __dw_i2c_init(priv->regs, 0, 0);
+}
+
+static int designware_i2c_remove(struct udevice *dev)
+{
+ struct dw_i2c *priv = dev_get_priv(dev);
+
+#if CONFIG_IS_ENABLED(CLK)
+ clk_disable(&priv->clk);
+ clk_free(&priv->clk);
+#endif
+
+ return reset_release_bulk(&priv->resets);
}
static int designware_i2c_bind(struct udevice *dev)
.bind = designware_i2c_bind,
.probe = designware_i2c_probe,
.priv_auto_alloc_size = sizeof(struct dw_i2c),
+ .remove = designware_i2c_remove,
+ .flags = DM_FLAG_OS_PREPARE,
.ops = &designware_i2c_ops,
};
projects / oweals / u-boot.git / blobdiff