write and speed, is implemented with the bus drivers operations,
which provide methods for bus setting and data transfer. Each chip
device (bus child) info is kept as parent platdata. The interface
- is defined in include/i2c.h. When i2c bus driver supports the i2c
- uclass, but the device drivers not, then DM_I2C_COMPAT config can
- be used as compatibility layer.
-
-config DM_I2C_COMPAT
- bool "Enable I2C compatibility layer"
- depends on DM
- help
- Enable old-style I2C functions for compatibility with existing code.
- This option can be enabled as a temporary measure to avoid needing
- to convert all code for a board in a single commit. It should not
- be enabled for any board in an official release.
+ is defined in include/i2c.h.
config I2C_CROS_EC_TUNNEL
tristate "Chrome OS EC tunnel I2C bus"
channels and operating on standard mode up to 100 kbits/s and fast
mode up to 400 kbits/s.
-if SYS_I2C_MXC
+# These settings are not used with DM_I2C, however SPL doesn't use
+# DM_I2C even if DM_I2C is enabled, and so might use these settings even
+# when main u-boot does not!
+if SYS_I2C_MXC && (!DM_I2C || SPL)
config SYS_I2C_MXC_I2C1
bool "NXP MXC I2C1"
help
config SYS_I2C_OMAP24XX
bool "TI OMAP2+ I2C driver"
- depends on ARCH_OMAP2PLUS
+ depends on ARCH_OMAP2PLUS || ARCH_K3
help
Add support for the OMAP2+ I2C driver.