firmware: Remove probe which is causing extra bind

[oweals/u-boot.git] / drivers / fpga / socfpga_gen5.c

diff --git a/drivers/fpga/socfpga_gen5.c b/drivers/fpga/socfpga_gen5.c
index 88ae035e29d9beb2a9955600336d63b80f5413d4..d73474f29ee13f209066c6c0efaf701702bc2bc2 100644 (file)
--- a/drivers/fpga/socfpga_gen5.c
+++ b/drivers/fpga/socfpga_gen5.c
@@ -1,8 +1,7 @@
+// SPDX-License-Identifier: BSD-3-Clause
 /*
  * Copyright (C) 2012 Altera Corporation <www.altera.com>
  * All rights reserved.
- *
- * SPDX-License-Identifier:    BSD-3-Clause
  */
 
 #include <common.h>
@@ -16,8 +15,6 @@
 
 static struct socfpga_fpga_manager *fpgamgr_regs =
        (struct socfpga_fpga_manager *)SOCFPGA_FPGAMGRREGS_ADDRESS;
-static struct socfpga_system_manager *sysmgr_regs =
-       (struct socfpga_system_manager *)SOCFPGA_SYSMGR_ADDRESS;
 
 /* Set CD ratio */
 static void fpgamgr_set_cd_ratio(unsigned long ratio)
@@ -205,7 +202,7 @@ static int fpgamgr_program_poll_usermode(void)
  */
 int socfpga_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size)
 {
-       unsigned long status;
+       int status;
 
        if ((uint32_t)rbf_data & 0x3) {
                puts("FPGA: Unaligned data, realign to 32bit boundary.\n");
@@ -215,7 +212,7 @@ int socfpga_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size)
        /* Prior programming the FPGA, all bridges need to be shut off */
 
        /* Disable all signals from hps peripheral controller to fpga */
-       writel(0, &sysmgr_regs->fpgaintfgrp_module);
+       writel(0, socfpga_get_sysmgr_addr() + SYSMGR_GEN5_FPGAINFGRP_MODULE);
 
        /* Disable all signals from FPGA to HPS SDRAM */
 #define SDR_CTRLGRP_FPGAPORTRST_ADDRESS        0x5080