spi: zynqmp: Remove unused platform headers

[oweals/u-boot.git] / drivers / fpga / Kconfig

diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
index 50e901973d1369ba86d4574b8e40389ea201902d..fe398a1d4965b33b2ff4e244b61e877c2913ae1f 100644 (file)
--- a/drivers/fpga/Kconfig
+++ b/drivers/fpga/Kconfig
@@ -31,6 +31,17 @@ config FPGA_CYCLON2
          Enable FPGA driver for loading bitstream in BIT and BIN format
          on Altera Cyclone II device.
 
+config FPGA_STRATIX10
+       bool "Enable Altera FPGA driver for Stratix 10"
+       depends on TARGET_SOCFPGA_STRATIX10
+       select FPGA_ALTERA
+       help
+         Say Y here to enable the Altera Stratix 10 FPGA specific driver
+
+         This provides common functionality for Altera Stratix 10 devices.
+         Enable FPGA driver for writing bitstream into Altera Stratix10
+         device.
+
 config FPGA_XILINX
        bool "Enable Xilinx FPGA drivers"
        select FPGA
@@ -45,11 +56,28 @@ config FPGA_ZYNQMPPL
          Enable FPGA driver for loading bitstream in BIT and BIN format
          on Xilinx Zynq UltraScale+ (ZynqMP) device.
 
+config FPGA_VERSALPL
+       bool "Enable Xilinx FPGA driver for Versal"
+       depends on FPGA_XILINX
+       help
+         Enable FPGA driver for loading bitstream in PDI format on Xilinx
+         Versal device. PDI is a new programmable device image format for
+         Versal. The bitstream will only be generated as PDI for Versal
+         platform.
+
 config FPGA_SPARTAN3
        bool "Enable Spartan3 FPGA driver"
+       depends on FPGA_XILINX
        help
          Enable Spartan3 FPGA driver for loading in BIT format.
 
+config FPGA_VIRTEX2
+       bool "Enable Xilinx Virtex-II and later FPGA driver"
+       depends on FPGA_XILINX
+       help
+         Enable Virtex-II FPGA driver for loading in BIT format. This driver
+         also supports many newer Xilinx FPGA families.
+
 config FPGA_ZYNQPL
        bool "Enable Xilinx FPGA for Zynq"
        depends on ARCH_ZYNQ