Merge branch 'master' of git://www.denx.de/git/u-boot-socfpga

[oweals/u-boot.git] / drivers / ddr / fsl / options.c

diff --git a/drivers/ddr/fsl/options.c b/drivers/ddr/fsl/options.c
index 5986e1a0b9da3b5099fcdac4b46594c9b1fc3180..3b30fa284c49fc2a2194d5f0a19fc7565bcc4bdb 100644 (file)
--- a/drivers/ddr/fsl/options.c
+++ b/drivers/ddr/fsl/options.c
@@ -728,11 +728,16 @@ unsigned int populate_memctl_options(int all_dimms_registered,
 
        /* Choose ddr controller address mirror mode */
 #if defined(CONFIG_SYS_FSL_DDR3) || defined(CONFIG_SYS_FSL_DDR4)
-       popts->mirrored_dimm = pdimm[0].mirrored_dimm;
+       for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
+               if (pdimm[i].n_ranks) {
+                       popts->mirrored_dimm = pdimm[i].mirrored_dimm;
+                       break;
+               }
+       }
 #endif
 
        /* Global Timing Parameters. */
-       debug("mclk_ps = %u ps\n", get_memory_clk_period_ps());
+       debug("mclk_ps = %u ps\n", get_memory_clk_period_ps(ctrl_num));
 
        /* Pick a caslat override. */
        popts->cas_latency_override = 0;
@@ -777,10 +782,6 @@ unsigned int populate_memctl_options(int all_dimms_registered,
         */
        popts->bstopre = 0x100;
 
-       /* Minimum CKE pulse width -- tCKE(MIN) */
-       popts->tcke_clock_pulse_width_ps
-               = mclk_to_picos(FSL_DDR_MIN_TCKE_PULSE_WIDTH_DDR);
-
        /*
         * Window for four activates -- tFAW
         *
@@ -789,7 +790,7 @@ unsigned int populate_memctl_options(int all_dimms_registered,
         * FIXME: width, was considering looking at pdimm->primary_sdram_width
         */
 #if defined(CONFIG_SYS_FSL_DDR1)
-       popts->tfaw_window_four_activates_ps = mclk_to_picos(1);
+       popts->tfaw_window_four_activates_ps = mclk_to_picos(ctrl_num, 1);
 
 #elif defined(CONFIG_SYS_FSL_DDR2)
        /*
@@ -1040,7 +1041,7 @@ done:
        if (pdimm[0].n_ranks == 4)
                popts->quad_rank_present = 1;
 
-       ddr_freq = get_ddr_freq(0) / 1000000;
+       ddr_freq = get_ddr_freq(ctrl_num) / 1000000;
        if (popts->registered_dimm_en) {
                popts->rcw_override = 1;
                popts->rcw_1 = 0x000a5a00;
@@ -1065,18 +1066,21 @@ void check_interleaving_options(fsl_ddr_info_t *pinfo)
        unsigned int check_intlv, check_n_row_addr, check_n_col_addr;
        unsigned long long check_rank_density;
        struct dimm_params_s *dimm;
+       int first_ctrl = pinfo->first_ctrl;
+       int last_ctrl = first_ctrl + pinfo->num_ctrls - 1;
+
        /*
         * Check if all controllers are configured for memory
         * controller interleaving. Identical dimms are recommended. At least
         * the size, row and col address should be checked.
         */
        j = 0;
-       check_n_ranks = pinfo->dimm_params[0][0].n_ranks;
-       check_rank_density = pinfo->dimm_params[0][0].rank_density;
-       check_n_row_addr =  pinfo->dimm_params[0][0].n_row_addr;
-       check_n_col_addr = pinfo->dimm_params[0][0].n_col_addr;
-       check_intlv = pinfo->memctl_opts[0].memctl_interleaving_mode;
-       for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) {
+       check_n_ranks = pinfo->dimm_params[first_ctrl][0].n_ranks;
+       check_rank_density = pinfo->dimm_params[first_ctrl][0].rank_density;
+       check_n_row_addr =  pinfo->dimm_params[first_ctrl][0].n_row_addr;
+       check_n_col_addr = pinfo->dimm_params[first_ctrl][0].n_col_addr;
+       check_intlv = pinfo->memctl_opts[first_ctrl].memctl_interleaving_mode;
+       for (i = first_ctrl; i <= last_ctrl; i++) {
                dimm = &pinfo->dimm_params[i][0];
                if (!pinfo->memctl_opts[i].memctl_interleaving) {
                        continue;
@@ -1094,7 +1098,7 @@ void check_interleaving_options(fsl_ddr_info_t *pinfo)
 
        }
        if (intlv_invalid) {
-               for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++)
+               for (i = first_ctrl; i <= last_ctrl; i++)
                        pinfo->memctl_opts[i].memctl_interleaving = 0;
                printf("Not all DIMMs are identical. "
                        "Memory controller interleaving disabled.\n");
@@ -1123,10 +1127,10 @@ void check_interleaving_options(fsl_ddr_info_t *pinfo)
                }
                debug("%d of %d controllers are interleaving.\n", j, k);
                if (j && (j != k)) {
-                       for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++)
+                       for (i = first_ctrl; i <= last_ctrl; i++)
                                pinfo->memctl_opts[i].memctl_interleaving = 0;
-                       printf("Not all controllers have compatible "
-                               "interleaving mode. All disabled.\n");
+                       if ((last_ctrl - first_ctrl) > 1)
+                               puts("Not all controllers have compatible interleaving mode. All disabled.\n");
                }
        }
        debug("Checking interleaving options completed\n");