Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq

[oweals/u-boot.git] / drivers / clk / clk_zynq.c

diff --git a/drivers/clk/clk_zynq.c b/drivers/clk/clk_zynq.c
index 50f2a65c205edc1dbc41c2d6c1a8a5f8d260b314..a699a3664c335ac738bca1bbaf880f3e786337c4 100644 (file)
--- a/drivers/clk/clk_zynq.c
+++ b/drivers/clk/clk_zynq.c
@@ -1,16 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2017 Weidmüller Interface GmbH & Co. KG
  * Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
  *
  * Copyright (C) 2013 Soren Brinkmann <soren.brinkmann@xilinx.com>
  * Copyright (C) 2013 Xilinx, Inc. All rights reserved.
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
 #include <clk-uclass.h>
 #include <dm.h>
+#include <log.h>
+#include <dm/device_compat.h>
 #include <dm/lists.h>
 #include <errno.h>
 #include <asm/io.h>
@@ -394,7 +395,7 @@ static ulong zynq_clk_get_rate(struct clk *clk)
                return zynq_clk_get_peripheral_rate(priv, id, two_divs);
        case dma_clk:
                return zynq_clk_get_cpu_rate(priv, cpu_2x_clk);
-       case usb0_aper_clk ... smc_aper_clk:
+       case usb0_aper_clk ... swdt_clk:
                return zynq_clk_get_cpu_rate(priv, cpu_1x_clk);
        default:
                return -ENXIO;
@@ -435,6 +436,8 @@ static ulong zynq_clk_get_rate(struct clk *clk)
        case lqspi_clk ... pcap_clk:
        case sdio0_clk ... spi1_clk:
                return zynq_clk_get_peripheral_rate(priv, id, 0);
+       case i2c0_aper_clk ... i2c1_aper_clk:
+               return zynq_clk_get_cpu_rate(priv, cpu_1x_clk);
        default:
                return -ENXIO;
        }
@@ -481,7 +484,6 @@ U_BOOT_DRIVER(zynq_clk) = {
        .name           = "zynq_clk",
        .id             = UCLASS_CLK,
        .of_match       = zynq_clk_ids,
-       .flags          = DM_FLAG_PRE_RELOC,
        .ops            = &zynq_clk_ops,
        .priv_auto_alloc_size = sizeof(struct zynq_clk_priv),
        .probe          = zynq_clk_probe,